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GS9090B Datasheet(PDF) 10 Page - Gennum Corporation

Part # GS9090B
Description  GenLINX짰 III 270Mb/s Deserializer for SDI
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Manufacturer  GENNUM [Gennum Corporation]
Direct Link  http://www.gennum.com
Logo GENNUM - Gennum Corporation

GS9090B Datasheet(HTML) 10 Page - Gennum Corporation

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GS9090B Data Sheet
40749 - 2
January 2007
10 of 71
49
SMPTE_BYPASS
Non
Synchronous
Input /
Output
CONTROL SIGNAL INPUT / STATUS SIGNAL OUTPUT
Signal levels are LVCMOS / LVTTL compatible.
This pin is an input in Manual mode, and an output set by the device in
Auto mode.
Auto Mode (AUTO/MAN = HIGH):
The SMPTE_BYPASS signal will be HIGH only when the device has
locked to a SMPTE compliant data stream. It will be LOW otherwise.
When the signal is LOW, no I/O processing features are available.
Manual Mode (AUTO/MAN = LOW):
When this pin is set HIGH in conjunction with DVB_ASI = LOW, the
device will be configured to operate in SMPTE mode. All I/O
processing features may be enabled in this mode.
When the SMPTE_BYPASS pin is set LOW, the device will not support
the descrambling, decoding, or word alignment of received SMPTE
data. No I/O processing features will be available.
50
AUTO/MAN
Non
Synchronous
Input
CONTROL SIGNAL INPUT
Signal levels are LVCMOS / LVTTL compatible.
When set HIGH, the GS9090B will operate in Auto mode. The
DVB_ASI and SMPTE_BYPASS pins become output status signals set
by the device. In this mode, the GS9090B will automatically detect,
reclock, deserialize, and process SMPTE or DVB-ASI compliant input
data.
When set LOW, the GS9090B will operate in Manual mode. The
DVB_ASI and SMPTE_BYPASS pins become input control signals. In
this mode, these two external pins must be set for the correct reception
of either SMPTE or DVB-ASI data. Manual mode also supports the
reclocking and deserializing of data not conforming to SMPTE or
DVB-ASI streams.
51
FW_EN
Non
Synchronous
Input
CONTOL SIGNAL INPUT
Signal levels are LVCMOS / LVTTL compatible.
Used to enable or disable the noise immune flywheel of the device.
When set HIGH, the internal flywheel is enabled. This flywheel is used
in the extraction of timing signals, the generation of TRS signals, the
automatic detection of video standards, and in manual switch line lock
handling.
When set LOW, the internal flywheel is disabled. Timing based TRS
errors will not be detected.
52
FIFO_EN
Non
Synchronous
Input
CONTOL SIGNAL INPUT
Signal levels are LVCMOS / LVTTL compatible.
Used to enable / disable the internal FIFO.
When FIFO_EN is HIGH, the internal FIFO will be enabled. Data will be
clocked out of the device on the rising edge of the RD_CLK input pin if
the FIFO is in video mode or DVB-ASI mode.
When FIFO_EN is LOW, the internal FIFO is bypassed and parallel
data is clocked out on the rising edge of the PCLK output.
Table 1-1: Pin List and Description (Continued)


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