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GS9090B Datasheet(PDF) 59 Page - Gennum Corporation |
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GS9090B Datasheet(HTML) 59 Page - Gennum Corporation |
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59 / 71 page  GS9090B Data Sheet 40749 - 2 January 2007 59 of 71 When the GS9090B is configured for low-latency mode, the H,V, and F output timing will be based on the incoming TRS codes as shown in Figure 3-15. Active line-based timing is not available and the setting of the H_CONFIG host interface bit will be ignored. Figure 3-15: H,V,F Timing In Low-latency Mode 3.14 GSPI Host Interface The GSPI, or Gennum Serial Peripheral Interface, is a 4-wire interface provided to allow access to the host interface of the GS9090B and/or to provide additional status information through configuration registers in the device. The GSPI comprises a serial data input signal SDIN, serial data output signal SDOUT, an active low chip select CS, and a burst clock SCLK. The burst clock must have a duty cycle between 40% and 60%. Because these pins are shared with the JTAG interface port, an additional control signal pin JTAG/HOST is provided. When JTAG/HOST is LOW, the GSPI interface is enabled. When operating in GSPI mode, the SCLK, SDIN, and CS signals are provided by the application interface. The SDOUT pin is a non-clocked loop-through of SDIN and may be connected to the SDIN of another device, allowing multiple devices to be connected to the GSPI chain. The interface is illustrated in Figure 3-16. Figure 3-16: GSPI Application Interface Connection Y/Cr/Cb DATA OUT PCLK H V F XYZ (eav) 000 000 3FF XYZ (sav) 000 000 3FF Application Host SCLK SCLK SCLK CS1 SDOUT SDIN SDOUT SDOUT CS SDIN SDIN CS2 GS9090B GS9090B CS |
Similar Part No. - GS9090B |
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Similar Description - GS9090B |
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