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MC13110A Datasheet(PDF) 47 Page - Motorola, Inc |
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MC13110A Datasheet(HTML) 47 Page - Motorola, Inc |
47 / 68 page MC13110A/B MC13111A/B 47 MOTOROLA ANALOG IC DEVICE DATA Figure 113. Reference Counter Register Programming Mode 0 0 1 1 0 1 0 1 1 25 4 4 1 4 25 4 LO2 Out Tx Reference Frequency 12–b Programmable Reference Counter ÷ 25 ÷1.0 ÷ 4.0 LO2 In Rx Reference Frequency U.K. Base U.K. Handset U.K. Handset U.K. Base U.K. Handset Select U.K. Base Select LO2 Tx Divider Value Rx Divider Value Application All but U.K. and Netherlands U.K. Base Set U.K. Hand Set Netherlands Base and Hand Set Figure 114. Reference Frequency and Divider Values MC13110A/B MC13111A/B Reference U.K. Base/ SC Filter SC Filter Scrambler Scrambler Crystal Divider Handset Reference Clock Clock Modulation Modulation Frequency Value Divider Frequency Divider Frequency Divider Frequency 10.24 MHz 2048 1 5.0 kHz 31 165.16 kHz 40 4.129 kHz 10.24 MHz 1024 4 5.0 kHz 31 165.16 kHz 40 4.129 kHz 11.15 MHz 2230 1 5.0 kHz 34 163.97 kHz 40 4.099 kHz 12.00 MHz 2400 1 5.0 kHz 36 166.67 kHz 40 4.167 kHz 11.15 MHz 1784 1 6.25 kHz 34 163.97 kHz 40 4.099 kHz 11.15 MHz 446 4 6.25 kHz 34 163.97 kHz 40 4.099 kHz 11.15 MHz 446 25 1.0 kHz 34 163.97 kHz 40 4.099 kHz Figure 115. Mode Control Register Stdby Mode 4–b Volume Control Rx Mode Tx Mute Rx Mute SP Mute ALC Disable Limiter Disable Clk Disable 0 MPU Clk 1 MPU Clk 0 MPU Clk 2 Reference Frequency Selection The “LO2 In” and “LO2 Out” pins form a reference oscillator when connected to an external parallel–resonant crystal. The reference oscillator is also the second local oscillator for the RF Receiver. Figure 114 shows the relationship between different crystal frequencies and reference frequencies for cordless phone applications in various countries. “LO2 In” may also serve as an input for an externally generated reference signal which is ac–coupled. The switched capacitor filter 6–bit programmable counter must be programmed for the crystal frequency that is selected since this clock is derived from the crystal frequency and must be held constant regardless of the crystal that is selected. The actual switched capacitor clock divider ratio is twice the programmed divider ratio due to the a fixed divide by 2.0 after the programmable counter. The scrambler mixer modulation frequency is the switched capacitor clock divided by 40 for the MC13110A/B. Mode Control Register The power saving modes; mutes, disables, volume control, and microprocessor clock output frequency are all set by the Mode Control Register. Operation of the Control Register is explained in Figures 115 through 119. Figure 116. Mute and Disable Control Bit Descriptions ALC Disable 1 0 Automatic Level Control Disabled Normal Operation Tx Limiter Disable 1 0 Tx Limiter Disabled Normal Operation Clock Disable (MC13110A/111A) 1 0 MPU Clock Output Disabled Normal Operation Clock Disable (MC13110B/111B) 1 0 Don’t Care Normal Operation Tx Mute 1 0 Transmit Channel Muted Normal Operation Rx Mute 1 0 Receive Channel Muted Normal Operation SP Mute 1 0 Speaker Amp Muted Normal Operation |
Similar Part No. - MC13110A |
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Similar Description - MC13110A |
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