Specifications subject to change without notice.

Applications:

10 Gigabit Ethernet

OC192: Forward Error Correction

Broadband Networks

SONET/SDH/DWD

ATM

Network/switch

Telecom

Designed using FR5 PCB & HFF crystal technology to

provide a very Low Noise, Low Jitter Voltage Controlled

Clock Oscillator solution at a competitive price.

9X14 mm SMD,

3.3V, LVPECL

CVPD-970 Model

622.08MHz to 670MHz

±25ppm

0°C to 70°C

-40°C to 85°C

-55°C to 120°C

3.3V ± 0.3V

1.65V ± 1.65V

80mA Max

Differential LVPECL

49/51% Typ, 45/55% Max

0.4ns Max @ 20% to 80% Vcc

± 50ppm Min.

± 10% Max

into 50 ohms

Vcc-0.96V Min, Vcc-0.81V Max

Vcc-1.85V Min, Vcc-1.65V Max

100ns Max

2ms Typ., 10ms Max

>10KHz @ -3dB

-40dBc

<5ps RMS (1-sigma) Max

<1ps RMS (1-sigma) Max,

<1ps RMS (1-sigma) Max,

-80 dBc/Hz

-108 dBc/Hz

-132 dBc/Hz

-140 dBc/Hz

<3ppm 1st/yr, <2ppm every year thereafter

Frequency Range:

Frequency Stability:

Temperature Range:

(Option X)

Storage:

Input Voltage:

Control Voltage:

Input Current:

Output:

Symmetry:

Rise/Fall Time:

Pullability APR:

Linearity:

Load: Terminated to Vdd-2V

Logic "1" Level:

Logic "0" Level:

Disable Time:

Start-up Time:

Modulation BW:

Sub-harmonics:

Period Jitter: (20,000 periods)

Phase Jitter:

12KHz~20MHz

50KHz~80MHz

Phase Noise Typical: 100Hz

1KHz

10KHz

100KHz

Aging:

TD-030607 Rev.C

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