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PCM2902E/2K Datasheet(PDF) 23 Page - Burr-Brown (TI) |
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PCM2902E/2K Datasheet(HTML) 23 Page - Burr-Brown (TI) |
23 / 35 page www.ti.com End-Points Clock and Reset Digital Audio Interface (PCM2902) Supported Input Data (PCM2902) PCM2900 PCM2902 SLES035E – MARCH 2007 – REVISED MARCH 2008 The PCM2900/2902 has the following four end-points. • Control end-point (EP #0) • Isochronous-out audio data stream end-point (EP #2) • Isochronous-in audio data stream end-point (EP #4) • HID end-point (EP #5) The control end-point is a default end-point. The control end-point is used to control all functions of the PCM2900/2902 by the standard USB request and USB audio class specific request from the host. The isochronous-out audio data stream end-point is an audio sink end-point, which receives the PCM audio data. The isochronous-out audio data stream end-point accepts the adaptive transfer mode. The isochronous-in audio data stream end-point is an audio source end-point, which transmits the PCM audio data. The isochronous-in audio data stream end-point uses asynchronous transfer mode. The HID end-point is an interrupt-in end-point. HID end-point reports HID0, HID1, and HID2 pin status every 32 ms. The human interface device (HID) pins are defined as consumer control devices. The HID function is designed as an independent end-point from both isochronous-in and -out end-points. This means that the result of affection for the HID operation depends on the host software. Typically, the HID function is affected for the primary audio-out device. The PCM2900/2902 requires a 12-MHz (±500 ppm) clock for the USB and audio function, which can be generated by a built-in crystal oscillator with a 12-MHz crystal resonator. The 12-MHz crystal resonator must be connected to XTI (pin 21) and XTO (pin 20) with one high (1-M Ω) resistor and two small capacitors, the capacitance of which depends on the load capacitance of the crystal resonator. The external clock can be supplied from XTI (pin 21). If the external clock is supplied, XTO (pin 20) must be left open. Because of no clock-disabling signal, it is not recommended to use the external clock supply. SSPND (pin 28) is unable to use clock disabling. The PCM2900/2902 has an internal power-on reset circuit, which works automatically when VBUS (pin 3) exceeds 2.5 V typical (2.7 V–2.2 V), and about 700 µs is required until internal reset release. The PCM2902 employs both S/PDIF input and output. Isochronous-out data from the host is encoded to the S/PDIF output and the DAC analog output. Input data is selected as either S/PDIF or ADC analog input. When the device detects an S/PDIF input and successfully locks the received data, the isochronous-in transfer data source is automatically selected from S/PDIF itself; otherwise, the data source is selected to ADC analog input. The following data formats are accepted by the S/PDIF input and output. All other data formats are unable to use S/PDIF. • 48-kHz 16-bit stereo • 44.1-kHz 16-bit stereo • 32-kHz 16-bit stereo Mismatch between input data format and host command may cause unexpected results except in the following conditions. • Record monaural format from stereo data input at the same data rate • Record 8-bit format from 16-bit data input at the same data rate A combination between the above conditions is not accepted. For the playback, all possible data rate source is converted to 16-bit stereo format at the same source data rate. Copyright © 2007–2008, Texas Instruments Incorporated Submit Documentation Feedback 23 Product Folder Link(s): PCM2900 PCM2902 |
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