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M9346-BN3T Datasheet(PDF) 4 Page - STMicroelectronics |
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M9346-BN3T Datasheet(HTML) 4 Page - STMicroelectronics |
4 / 34 page ![]() M93S66, M93S56, M93S46 4/34 SUMMARY DESCRIPTION This specification covers a range of 4K, 2K, 1K bit serial Electrically Erasable Programmable Memo- ry (EEPROM) products (respectively for M93S66, M93S56, M93S46). In this text, these products are collectively referred to as M93Sx6. Figure 2. Logic Diagram Table 1. Signal Names The M93Sx6 is accessed through a serial input (D) and output (Q) using the MICROWIRE bus proto- col. The memory is divided into 256, 128, 64 x16 bit words (respectively for M93S66, M93S56, M93S46). The M93Sx6 is accessed by a set of instructions which includes Read, Write, Page Write, Write All and instructions used to set the memory protec- tion. These are summarized in Table 2. and Table 3.). A Read Data from Memory (READ) instruction loads the address of the first word to be read into an internal address pointer. The data contained at this address is then clocked out serially. The ad- dress pointer is automatically incremented after the data is output and, if the Chip Select Input (S) is held High, the M93Sx6 can output a sequential stream of data words. In this way, the memory can be read as a data stream from 16 to 4096 bits (for the M93S66), or continuously as the address counter automatically rolls over to 00h when the highest address is reached. Within the time required by a programming cycle (tW), up to 4 words may be written with help of the Page Write instruction. the whole memory may also be erased, or set to a predetermined pattern, by using the Write All instruction. Within the memory, a user defined area may be protected against further Write instructions. The size of this area is defined by the content of a Pro- tection Register, located outside of the memory ar- ray. As a final protection step, data may be permanently protected by programming a One Time Programming bit (OTP bit) which locks the Protection Register content. Programming is internally self-timed (the external clock signal on Serial Clock (C) may be stopped or left running after the start of a Write cycle) and does not require an erase cycle prior to the Write instruction. The Write instruction writes 16 bits at a time into one of the word locations of the M93Sx6, the Page Write instruction writes up to 4 words of 16 bits to sequential locations, assuming in both cases that all addresses are outside the Write Pro- tected area. After the start of the programming cy- cle, a Busy/Ready signal is available on Serial Data Output (Q) when Chip Select Input (S) is driv- en High. Figure 3. DIP, SO and TSSOP Connections Note: See PACKAGE MECHANICAL section for package dimen- sions, and how to identify pin-1. S Chip Select Input D Serial Data Input Q Serial Data Output C Serial Clock PRE Protection Register Enable W Write Enable VCC Supply Voltage VSS Ground AI02020 D VCC M93Sx6 VSS C Q PRE W S VSS Q W PRE C SVCC D AI02021 M93Sx6 1 2 3 4 8 7 6 5 |
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