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M93S66, M93S56, M93S46

Table 17. AC Characteristics (M93Sx6-W, Device Grade 6)

2. Chip Select Input (S) must be brought Low for a minimum of tSLSH between consecutive instruction cycles.

3. Current product: identified by Process Identification letter F or M.

4. New product: identified by Process Identification letter W or G.

Test conditions specified in Table 9. and Table 6.

Symbol

Alt.

Parameter

Unit

Clock Frequency

D.C.

1

D.C.

2

MHz

Protect Enable Valid to Clock High

50

50

ns

Write Enable Valid to Clock High

50

50

ns

Clock Low to Protect Enable Transition

0

0

ns

Chip Select Low to Write Enable

Transition

250

250

ns

Chip Select Low to Clock High

250

50

ns

Chip Select Set-up Time

100

50

ns

2

Chip Select Low to Chip Select High

1000

200

ns

1

Clock High Time

350

200

ns

1

Clock Low Time

250

200

ns

Data In Set-up Time

100

50

ns

Data In Hold Time

100

50

ns

Clock Set-up Time (relative to S)

100

50

ns

Chip Select Hold Time

0

0

ns

Chip Select to Ready/Busy Status

400

200

ns

Chip Select Low to Output Hi-Z

200

100

ns

Delay to Output Low

400

200

ns

Delay to Output Valid

400

200

ns

Erase/Write Cycle time

10

5

ms