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M54HC292M1R Datasheet(PDF) 1 Page - STMicroelectronics |
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M54HC292M1R Datasheet(HTML) 1 Page - STMicroelectronics |
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1 / 14 page  M54/74HC292/7292 M54/74HC294/7294 October 1993 PROGRAMMABLE DIVIDER/TIMER B1R (Plastic Package) ORDER CODES : M54HCXXXF1R M74HCXXXM1R M74HCXXXB1R M74HCXXXC1R F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) PIN CONNECTION (top view) . HIGH SPEED fMAX = 70 MHz (TYP.) at VCC =5 V . LOW POWER DISSIPATION ICC = 4 mA (MAX.) at TA =25 oC . HIGH NOISE IMMUNITY VNIH =VNIL =28 % VCC (MIN.) . OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS . SYMMETRICAL OUTPUT IMPEDANCE |IOH|= IOL = 4 mA (MIN.) . BALANCED PROPAGATION DELAYS tPLH =tPHL . WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V . PIN AND FUNCTION COMPATIBLE WITH 54/74LS292/294 DESCRIPTION The 54/74HC292/7292 and HC294/7294 are high speed CMOS PROGRAMMABLE DIVIDER/TIMER fabricated with silicon C 2MOS technology. They achieve the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. These devices are programmable frequency dividers. The types have two clock inputs, either one may be used for clock gating. (see the function table). The HC292/7292 can divide from 2 2 to 231, and the HC294/7294 can divide from 2 2 to 215. The types feature an active-low clear input to initialize the state of all flip-flops. To facilitate incoming inspection, test points are provided. (TP1, TP2 and TP3 on the HC292/7292 and TP on the HC294/7294). All inputs are equipped with protection circuits against static discharge and transient excess voltage. HC292/294 have Q output with ”Totem pole” configuration and test point TP with ”Open Drain” output configuration. HC7292/7294 have all outputs ”Totem Pole”. HC292 HC7292 HC294 HC7294 HC292 HC7292 HC294 HC7294 1/14 |
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