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MB90330A Datasheet(PDF) 17 Page - Fujitsu Component Limited. |
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MB90330A Datasheet(HTML) 17 Page - Fujitsu Component Limited. |
17 / 120 page MB90330A Series 17 ■ BLOCK DIAGRAM F2MC-16LX CPU RAM 8/16-bit PPG timer ch.0 to ch.5* Input capture ch.0 to ch.3 16-bit free-run timer Output compare ch.0 to ch.3 16-bit PWC SIO µDMAC 8/10-bit A/D converter External interrupt I/O port (port 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B) 16-bit reload timer ch.0 to ch.2 USB (Function) (Mini-HOST) Clock control circuit Interrupt controller ROM UART/SIO ch.0 to ch.3 I2C ch.0 to ch.2 P00 P07 P10 P17 P20 P27 P30 P37 P40 P47 P50 P57 P60 P67 X0, X1 X0A,X1A RST MD0 to MD2 SIN0 to SIN3 SOT0 to SOT3 SCK0 to SCK3 SCL0 to SCL2 SDA0 to SDA2 INT0 to INT7 AVCC AVRH AVSS AN0 to AN15 ADTG DVP DVM HVP HVM HCON UTEST TOT0 to TOT2 TIN0 to TIN2 PPG0 to PPG5 FRCK IN0 to IN3 OUT0 to OUT3 PWC SIN SOT SCK P80 P87 P70 P77 P90 P96 PB0 PB6 PA0 PA7 * : Channel for use in 8-bit mode. 3 channels (ch.1, ch.3, ch.5) are used in 16-bit mode. Note : I/O ports share pins with peripheral function (resources) . For details, refer to “ ■ PIN ASSIGNMENT” and “■ PIN DESCRIPTION”. Note also that pins used for peripheral function (resources) cannot serve as I/O ports. |
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