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MB90330A Datasheet(PDF) 104 Page - Fujitsu Component Limited. |
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MB90330A Datasheet(HTML) 104 Page - Fujitsu Component Limited. |
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104 / 120 page  MB90330A Series 104 (10) Bus read timing (VCC = AVCC = 3.3 V ± 0.3 V, VSS = AVSS = 0.0 V, TA = 0 °C to + 70 °C) Note : tCP : Refer to “ (1) Clock input timing”. Parameter Sym- bol Pin name Conditions Value Unit Remarks Min Max ALE pulse width tLHLL ALE ⎯ tCP /2 − 15 ⎯ ns At fcp = 24 MHz tCP /2 − 20 ⎯ ns At fcp = 12 MHz tCP /2 − 35 ⎯ ns At fcp = 6 MHz Valid address →ALE↓time tAVLL Address, ALE ⎯ tCP /2 − 17 ⎯ ns tCP /2 − 40 ⎯ ns At fcp = 6 MHz ALE ↓→Address valid time tLLAX ALE, Address ⎯ tCP /2 − 15 ⎯ ns Valid address →RD↓time tAVRL RD, Address ⎯ tCP − 25 ⎯ ns Valid address →valid data input tAVDV Address/ data ⎯ ⎯ 5 tCP /2 − 55 ns ⎯ 5 tCP /2 − 80 ns At fcp = 6 MHz RD pulse width tRLRH RD ⎯ 3 tCP /2 − 25 ⎯ ns At fcp = 24 MHz 3 tCP /2 − 20 ⎯ ns At fcp = 12 MHz RD ↓→valid data input tRLDV RD, Data ⎯ ⎯ 3 tCP /2 − 55 ns ⎯ 3 tCP /2 − 80 ns At fcp = 6 MHz RD ↓→data hold time tRHDX RD, Data ⎯ 0 ⎯ ns RD ↑→ALE↑time tRHLH RD, ALE ⎯ tCP /2 − 15 ⎯ ns RD ↑→address valid time tRHAX Address, RD ⎯ tCP /2 − 10 ⎯ ns Valid address →CLK↑time tAVCH Address, CLK ⎯ tCP /2 − 17 ⎯ ns RD ↓→CLK↑time tRLCH RD, CLK ⎯ tCP /2 − 17 ⎯ ns ALE ↓→RD↓time tLLRL RD, ALE ⎯ tCP /2 − 15 ⎯ ns |
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