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S1D13706F00A Datasheet(PDF) 71 Page - Epson Company |
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S1D13706F00A Datasheet(HTML) 71 Page - Epson Company |
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71 / 94 page  S1D13305 Series EPSON 65 Technical Manual 16. APPLICATION NOTES 16.1. Initialization Parameters The parameters for the initialization commands must be determined first. Square brackets around a parameter name indicate the number represented by the parameter, rather than the value written to the parameter register. For example, [FX] = FX + 1. 16.1.1. SYSTEM SET instruction and parameters Ì FX The horizontal character field size is determined from the horizontal display size in pixels [VD] and the number of characters per line [VC]. [VD] / [VC] ≤ [FX] Ì C/R C/R can be determined from VC and FX. [C/R] = RND ([FX] / 8) × [VC] where RND(x) denotes × rounded up to the next highest integer. [C/R] is the number of bytes per line, not the number of characters. Ì TC/R TC/R must satisfy the condition [TC/R] ≥ [C/R] + 4. Ì fOSC and fFR Once TC/R has been set, the frame frequency, fFR, and lines per frame [L/F] will also have been set. The lower limit on the oscillator frequency fOSC is given by: fOSC ≥ ([TC/R] × 9 + 1) × [L/F] × fFR Ì If no standard crystal close to the calculated value of fOSC exists, a higher frequency crystal can be used and the value of TC/R revised using the above equation. Ì Symptoms of an incorrect TC/R setting are listed below. If any of these appears, check the value of TC/ R and modify it if necessary. • Vertical scanning halts and a high-contrast hori- zontal line appears. • All pixels are on or off. • The LP output signal is absent or corrupted. • The display is unstable. RESET/APPLICATION NOTES The S1D13305 series requires a reset pulse at least 1 ms long after power-on in order to re-initialize its internal state. For maximum reliability, it is not recommended to apply a DC voltage to the LCD panel while the S1D13305 series is reset. Turn off the LCD power supplies for at least one frame period after the start of the reset pulse. The S1D13305 series cannot receive commands while it is reset. Commands to initialize the internal registers should be issued soon after a reset. During reset, the LCD drive signals XD, LP and FR are halted. A delay of 3 ms (maximum) is required following the rising edges of both RES and VDD to allow for system stabilization. 15. RESET Figure 56. Reset timing 1ms reset pulse 0.7 VDD 0.3 VDD VDD RES |
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