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M27C256B Datasheet(PDF) 8 Page - STMicroelectronics |
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M27C256B Datasheet(HTML) 8 Page - STMicroelectronics |
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8 / 16 page  M27C256B 8/16 PRESTO II Programming Algorithm PRESTO II Programming Algorithm allows to pro- gram the whole array with a guaranteed margin, in a typical time of 3.5 seconds. Programming with PRESTO II involves the application of a sequence of 100µs program pulses to each byte until a cor- rect verify occurs (see Figure 7). During program- ming and verify operation, a MARGIN MODE circuit is automatically activated in order to guar- antee that each cell is programmed with enough margin. No overprogram pulse is applied since the verify in MARGIN MODE provides necessary mar- gin to each programmed cell. Program Inhibit Programming of multiple M27C256Bs in parallel with different data is also easily accomplished. Ex- cept for E, all like inputs including G of the parallel M27C256B may be common. A TTL low level pulse applied to a M27C256B's E input, with VPP at 12.75V, will program that M27C256B. A high level E input inhibits the other M27C256Bs from being programmed. Program Verify A verify (read) should be performed on the pro- grammed bits to determine that they were correct- ly programmed. The verify is accomplished with G at VIL, E at VIH, VPP at 12.75V and VCC at 6.25V. Figure 6. Programming and Verify Modes AC Waveforms tAVEL VALID AI00759 A0-A14 Q0-Q7 VPP VCC G DATA IN DATA OUT E tQVEL tVPHEL tVCHEL tEHQX tELEH tGLQV tQXGL tGHQZ tGHAX PROGRAM VERIFY Figure 7. Programming Flowchart AI00760B n = 0 Last Addr VERIFY E = 100 µs Pulse ++n = 25 ++ Addr VCC = 6.25V, VPP = 12.75V FAIL CHECK ALL BYTES 1st: VCC = 6V 2nd: VCC = 4.2V YES NO YES NO YES NO |
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