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M58WR016QT Datasheet(PDF) 32 Page - Numonyx B.V |
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M58WR016QT Datasheet(HTML) 32 Page - Numonyx B.V |
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32 / 110 page  Command interface - factory program commands M58WR016QT, M58WR016QB, M58WR032QT, 32/110 6.4.3 Verify Phase The Verify Phase is similar to the Program Phase in that all Words must be resent to the memory for them to be checked against the programmed data. The Program/Erase Controller checks the stream of data with the data that was programmed in the Program Phase and reprograms the memory location if necessary. Three successive steps are required to execute the Verify Phase of the command. 1. Use one Bus Write operation to latch the Start Address and the first Word, to be verified. The Status Register bit SR0 should be read to check that the Program/Erase Controller is ready for the next Word. 2. Each subsequent Word to be verified is latched with a new Bus Write operation. The Words must be written in the same order as in the Program Phase. The address can remain the Start Address or be incremented. If any address that is not in the same block as the Start Address is given with data FFFFh, the Verify Phase terminates. Status Register bit SR0 should be read to check that the P/E.C. is ready for the next Word. 3. Finally, after all Words have been verified, write one Bus Write operation with data FFFFh to any address outside the block containing the Start Address, to terminate the Verify Phase. If the Verify Phase is successfully completed the memory remains in Read Status Register mode. If the Program/Erase Controller fails to reprogram a given location, the error will be signaled in the Status Register. 6.4.4 Exit Phase Status Register P/E.C. bit SR7 set to ‘1’ indicates that the device has returned to Read mode. A full Status Register check should be done to ensure that the block has been successfully programmed. See the section on the Status Register for more details. 6.5 Quadruple Enhanced Factory Program command The Quadruple Enhanced Factory Program command can be used to program one or more pages of four adjacent words in parallel. The four words must differ only for the addresses A0 and A1. Dual operations are not supported during Quadruple Enhanced Factory Program operations and the command cannot be suspended. If the block is protected, the Quadruple Enhanced Factory Program operation will abort, the data in the block will not be changed and the Status Register will output the error. The Quadruple Enhanced Factory Program command has four phases: the Setup Phase, the Load Phase where the data is loaded into the buffer, the combined Program and Verify Phase where the loaded data is programmed to the memory and then automatically checked and reprogrammed if necessary and the Exit Phase. Unlike the Enhanced Factory Program it is not necessary to resubmit the data for the Verify Phase. The Load Phase and the Program and Verify Phase can be repeated to program any number of pages within the block. |
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