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M58WR016QT Datasheet(PDF) 88 Page - Numonyx B.V

Part # M58WR016QT
Description  16 Mbit and 32 Mbit (x16, Multiple Bank, Burst) 1.8V supply Flash memories
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Manufacturer  NUMONYX [Numonyx B.V]
Direct Link  http://www.numonyx.com
Logo NUMONYX - Numonyx B.V

M58WR016QT Datasheet(HTML) 88 Page - Numonyx B.V

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Common Flash Interface
M58WR016QT, M58WR016QB, M58WR032QT, M58WR032QB
88/110
Table 38.
Protection Register Information
Offset
Data
Description
Value
(P+E)h = 47h
0001h
Number of protection register fields in JEDEC ID space.
0000h indicates that 256 fields are available.
1
(P+F)h = 48h
0080h
Protection Field 1: Protection Description
Bits 0-7 Lower byte of protection register address
Bits 8-15 Upper byte of protection register address
Bits 16-23 2n bytes in factory pre-programmed region
Bits 24-31 2n bytes in user programmable region
0080h
(P+10)h = 49h
0000h
(P+11)h = 4Ah
0003h
8 Bytes
(P+12)h = 4Bh
0004h
16 Bytes
Table 39.
Burst Read information
Offset
Data
Description
Value
(P+13)h = 4Ch
0003h
Page-mode read capability
bits 0-7’n’ such that 2n HEX value represents the number of
read-page bytes. See offset 28h for device word width to
determine page-mode data output width.
8
Bytes
(P+14)h = 4Dh
0004h
Number of synchronous mode read configuration fields that
follow.
4
(P+15)h = 4Eh
0001h
Synchronous mode read capability configuration 1
bit 3-7Reserved
bit 0-2’n’ such that 2n+1 HEX value represents the maximum
number of continuous synchronous reads when the device is
configured for its maximum word width. A value of 07h
indicates that the device is capable of continuous linear bursts
that will output data until the internal burst counter reaches the
end of the device’s burstable address space. This field’s 3-bit
value can be written directly to the read configuration register
bit 0-2 if the device is configured for its maximum word width.
See offset 28h for word width to determine the burst data
output width.
4
(P+16)h = 4Fh
0002h
Synchronous mode read capability configuration 2
8
(P+17)h = 50h
0003h
Synchronous mode read capability configuration 3
16
(P+18)h = 51h
0007h
Synchronous mode read capability configuration 4
Cont.
Table 40.
Bank and erase block region information(1) (2)
1.
The variable P is a pointer which is defined at CFI offset 15h.
2.
Bank Regions. There are two Bank Regions, see Table 29 and Table 30 for the M58WR016QT/B and see
Table 31 and Table 32 for the M58WR032QT/B.
TOP DEVICES
BOTTOM DEVICES
Description
Offset
Data
Offset
Data
(P+19)h = 52h
02h
(P+19)h = 52h
02h
Number of Bank Regions within the device


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