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M58WR016QT Datasheet(PDF) 69 Page - Numonyx B.V

Part # M58WR016QT
Description  16 Mbit and 32 Mbit (x16, Multiple Bank, Burst) 1.8V supply Flash memories
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Manufacturer  NUMONYX [Numonyx B.V]
Direct Link  http://www.numonyx.com
Logo NUMONYX - Numonyx B.V

M58WR016QT Datasheet(HTML) 69 Page - Numonyx B.V

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M58WR016QT, M58WR016QB, M58WR032QT, M58WR032QB
DC and AC parameters
69/110
Table 23.
Write AC characteristics, Write Enable controlled(1)
1.
Sampled only, not 100% tested.
Symbol
Alt
Parameter
M58WRxxxQT/B
Unit
60
70
80
tAVAV
tWC Address Valid to Next Address Valid
Min
60
70
80
ns
tAVLH
Address Valid to Latch Enable High
Min
7
9
9
ns
tAVWH
(2)
2.
Meaningful only if L is always kept low.
Address Valid to Write Enable High
Min
40
45
50
ns
tDVWH
tDS
Data Valid to Write Enable High
Min
40
45
50
ns
tELLH
Chip Enable Low to Latch Enable High
Min
10
10
10
ns
tELWL
tCS
Chip Enable Low to Write Enable Low
Min
0
0
0
ns
tELQV
Chip Enable Low to Output Valid
Min
60
70
80
ns
tELKV
Chip Enable Low to Clock Valid
Min
7
9
9
ns
tGHWL
Output Enable High to Write Enable
Low
Min
14
17
17
ns
tLHAX
Latch Enable High to Address
Transition
Min
799
ns
tLLLH
Latch Enable Pulse Width
Min
7
9
9
ns
tWHAV
(2)
Write Enable High to Address Valid
Min
0
0
0
ns
tWHAX
(2)
tAH
Write Enable High to Address Transition
Min
0
0
0
ns
tWHDX
tDH Write Enable High to Input Transition
Min
0
0
0
ns
tWHEH
tCH
Write Enable High to Chip Enable High
Min
0
0
0
ns
tWHEL
(3)
3.
tWHEL has this value when reading from the targeted bank or when reading from any address after a Set
Configuration Register command has been issued. System designers should take this into account and
may insert a software No-Op instruction to delay the first read in the same bank after issuing any
command, or to delay the first read to any address after issuing a Set Configuration Register command. If
the first read after the command is a Read Array operation in a different bank and no changes to the
Configuration Register have been issued, tWHEL is 0ns.
Write Enable High to Chip Enable Low
Min
20
25
25
ns
tWHGL
Write Enable High to Output Enable
Low
Min
000
ns
tWHLL
Write Enable High to Latch Enable Low
Min
0
0
0
ns
tWHWL
tWPH Write Enable High to Write Enable Low
Min
20
25
25
ns
tWLWH
tWP Write Enable Low to Write Enable High
Min
40
45
50
ns
tQVVPL
Output (Status Register) Valid to VPP
Low
Min
000
ns
tQVWPL
Output (Status Register) Valid to Write
Protect Low
Min
000
ns
tVPHWH
tVPS VPP High to Write Enable High
Min
200
200
200
ns
tWHVPL
Write Enable High to VPP Low
Min
200
200
200
ns
tWHWPL
Write Enable High to Write Protect Low
Min
200
200
200
ns
tWPHWH
Write Protect High to Write Enable High
Min
200
200
200
ns


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