M58WR016QT datasheet(41/110 Pages) NUMONYX

Part #	M58WR016QT

Description	16 Mbit and 32 Mbit (x16, Multiple Bank, Burst) 1.8V supply Flash memories

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Manufacturer	NUMONYX [Numonyx B.V]

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M58WR016QT, M58WR016QB, M58WR032QT, M58WR032QB

Configuration Register

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the Wrap Burst bit is set to ‘0’ the burst read wraps; when it is set to ‘1’ the burst read does

not wrap.

8.9

Burst length Bits (CR2-CR0)

The Burst Length bits set the number of Words to be output during a Synchronous Burst

Read operation as result of a single address latch cycle. They can be set for 4 Words, 8

Words, 16 Words or continuous burst, where all the words are read sequentially.

In continuous burst mode the burst sequence can cross bank boundaries.

In continuous burst mode or in 4, 8, 16 Words no-wrap, depending on the starting address,

the device asserts the WAIT output to indicate that a delay is necessary before the data is

output.

If the starting address is aligned to a 4 Word boundary no wait states are needed and the

WAIT output is not asserted.

If the starting address is shifted by 1,2 or 3 positions from the four word boundary, WAIT will

be asserted for 1, 2 or 3 clock cycles when the burst sequence crosses the first 16 Word

boundary, to indicate that the device needs an internal delay to read the successive words in

the array. WAIT will be asserted only once during a continuous burst access. See also

Table 11: Burst type definition.

CR14, CR5 and CR4 are reserved for future use.

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