M58WR016QT datasheet(4/110 Pages) NUMONYX

Part #	M58WR016QT

Description	16 Mbit and 32 Mbit (x16, Multiple Bank, Burst) 1.8V supply Flash memories

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Manufacturer	NUMONYX [Numonyx B.V]

Direct Link	http://www.numonyx.com

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4 / 110 page

Contents

M58WR016QT, M58WR016QB, M58WR032QT, M58WR032QB

4/110

7.0.7

Block Protection Status Bit (SR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

7.0.8

Bank Write/Multiple Word Program Status Bit (SR0) . . . . . . . . . . . . . . . 37

8

Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

8.1

Read Select Bit (CR15) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

8.2

X-Latency Bits (CR13-CR11) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

8.3

Wait Polarity Bit (CR10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

8.4

Data Output Configuration Bit (CR9) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

8.5

Wait Configuration Bit (CR8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

8.6

Burst Type Bit (CR7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

8.7

Valid Clock Edge Bit (CR6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

8.8

Wrap Burst Bit (CR3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

8.9

Burst length Bits (CR2-CR0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

9

Read modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

9.1

Asynchronous Read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

9.2

Synchronous Burst Read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

9.2.1

Synchronous Burst Read Suspend . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

9.3

Single Synchronous Read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

10

Dual operations and Multiple Bank architecture . . . . . . . . . . . . . . . . . 49

11

Block locking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

11.1

Reading a Block’s lock status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

11.2

Locked state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

11.3

Unlocked state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

11.4

Lock-Down state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

11.5

Locking operations during Erase Suspend . . . . . . . . . . . . . . . . . . . . . . . . 52

12

Program and erase times and endurance cycles . . . . . . . . . . . . . . . . . 54

13

Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

14

DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

15

Package mechanical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

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