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M58WR064HT Datasheet(PDF) 22 Page - Numonyx B.V |
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M58WR064HT Datasheet(HTML) 22 Page - Numonyx B.V |
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22 / 111 page  Command interface - Standard commands M58WR064HT, M58WR064HB 22/111 5.10 Protection Register Program Command The Protection Register Program command is used to Program the 128 bit user One-Time- Programmable (OTP) segment of the Protection Register and the Protection Register Lock. The segment is programmed 16 bits at a time. When shipped all bits in the segment are set to ‘1’. The user can only program the bits to ‘0’. Two write cycles are required to issue the Protection Register Program command. ● The first bus cycle sets up the Protection Register Program command. ● The second latches the Address and the Data to be written to the Protection Register and starts the Program/Erase Controller. Read operations output the Status Register content after the programming has started. The segment can be protected by programming bit 1 of the Protection Lock Register (see Figure 4: Protection Register Memory Map). Attempting to program a previously protected Protection Register will result in a Status Register error. The protection of the Protection Register is not reversible. The Protection Register Program cannot be suspended. Dual operations between the Parameter Bank and the Protection Register memory space are not allowed (see Table 14: Dual Operation Limitations) 5.11 The Set Configuration Register Command The Set Configuration Register command is used to write a new value to the Configuration Register which defines the burst length, type, X latency, Synchronous/Asynchronous Read mode and the valid Clock edge configuration. Two Bus Write cycles are required to issue the Set Configuration Register command. ● The first cycle writes the setup command and the address corresponding to the Configuration Register content. ● The second cycle writes the Configuration Register data and the confirm command. Read operations output the memory array content after the Set Configuration Register command is issued. The value for the Configuration Register is always presented on A0-A15. CR0 is on A0, CR1 on A1, etc.; the other address bits are ignored. 5.12 Block Lock Command The Block Lock command is used to lock a block and prevent Program or Erase operations from changing the data in it. All blocks are locked at power-up or reset. Two Bus Write cycles are required to issue the Block Lock command. ● The first bus cycle sets up the Block Lock command. ● The second Bus Write cycle latches the block address. The lock status can be monitored for each block using the Read Electronic Signature command. Table 15 shows the Lock Status after issuing a Block Lock command. The Block Lock bits are volatile, once set they remain set until a hardware reset or power- down/power-up. They are cleared by a Block Unlock command. Refer to the section, Block Locking, for a detailed explanation. See Appendix C, Figure 25: Locking Operations Flowchart and Pseudo Code, for a flowchart for using the Lock command. |
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