M58WR064HT datasheet(20/111 Pages) NUMONYX

Part #	M58WR064HT

Description	64 Mbit (4Mb x16, Multiple Bank, Burst) 1.8V supply Flash memories

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Manufacturer	NUMONYX [Numonyx B.V]

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Command interface - Standard commands

M58WR064HT, M58WR064HB

20/111

5.6

Block Erase Command

The Block Erase command can be used to erase a block. It sets all the bits within the

selected block to ’1’. All previous data in the block is lost. If the block is protected then the

Erase operation will abort, the data in the block will not be changed and the Status Register

will output the error. The Block Erase command can be issued at any moment, regardless of

whether the block has been programmed or not.

Two Bus Write cycles are required to issue the command.

●

The first bus cycle sets up the Erase command.

●

The second latches the block address in the Program/Erase Controller and starts it.

If the second bus cycle is not Write Erase Confirm (D0h), Status Register bits SR4 and SR5

are set and the command aborts. Erase aborts if Reset turns to VIL. As data integrity cannot

be guaranteed when the Erase operation is aborted, the block must be erased again.

Once the command is issued the device outputs the Status Register data when any address

within the bank is read. At the end of the operation the bank will remain in Read Status

Register mode until a Read Array, Read CFI Query or Read Electronic Signature command

is issued.

During Erase operations the bank containing the block being erased will only accept the

Read Array, Read Status Register, Read Electronic Signature, Read CFI Query and the

Program/Erase Suspend command, all other commands will be ignored. Refer to Dual

Operations section for detailed information about simultaneous operations allowed in banks

not being erased. Typical Erase times are given in Table 16: Program/Erase times and

endurance cycles.

See Appendix C, Figure 23: Block Erase Flowchart and Pseudo Code, for a suggested

flowchart for using the Block Erase command.

5.7

Program Command

The memory array can be programmed word-by-word. Only one Word in one bank can be

programmed at any one time. If the block is protected, the program operation will abort, the

data in the block will not be changed and the Status Register will output the error.

Two bus write cycles are required to issue the Program Command.

●

The first bus cycle sets up the Program command.

●

The second latches the Address and the Data to be written and starts the

Program/Erase Controller.

After programming has started, read operations in the bank being programmed output the

Status Register content.

During Program operations the bank being programmed will only accept the Read Array,

Read Status Register, Read Electronic Signature, Read CFI Query and the Program/Erase

Suspend command. Refer to Dual Operations section for detailed information about

simultaneous operations allowed in banks not being programmed. Typical Program times

are given in Table 16: Program/Erase times and endurance cycles.

Programming aborts if Reset goes to VIL. As data integrity cannot be guaranteed when the

program operation is aborted, the memory location must be reprogrammed.

See Appendix C, Figure 19: Program Flowchart and Pseudo Code, for the flowchart for

using the Program command.

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