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M58WR064HT Datasheet(PDF) 92 Page - Numonyx B.V

Part # M58WR064HT
Description  64 Mbit (4Mb x16, Multiple Bank, Burst) 1.8V supply Flash memories
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Manufacturer  NUMONYX [Numonyx B.V]
Direct Link  http://www.numonyx.com
Logo NUMONYX - Numonyx B.V

M58WR064HT Datasheet(HTML) 92 Page - Numonyx B.V

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Common Flash Interface
M58WR064HT, M58WR064HB
92/111
(P+2C)h = 65h
00h
(P+34)h = 6Dh
00h
Number of program or erase operations allowed in
other banks while a bank in this region is erasing
Bits 0-3: Number of simultaneous program
operations
Bits 4-7: Number of simultaneous erase operations
(P+2D)h = 66h
02h
(P+35)h = 6Eh
01h
Types of erase block regions in region 2
n = number of erase block regions with contiguous
same-size erase blocks.
Symmetrically blocked banks have one blocking
region.(2)
(P+2E)h = 67h
06h
(P+36)h = 6Fh
07h
Bank Region 2 Erase Block Type 1 Information
Bits 0-15: n+1 = number of identical-sized erase
blocks
Bits 16-31: n×256 = number of bytes in erase block
region
(P+2F)h = 68h
00h
(P+37)h = 70h
00h
(P+30)h = 69h
00h
(P+38)h = 71h
00h
(P+31)h = 6Ah
01h
(P+39)h = 72h
01h
(P+32)h = 6Bh
64h
(P+3A)h = 73h
64h
Bank Region 2 (Erase Block Type 1)
Minimum block erase cycles × 1000
(P+33)h = 6Ch
00h
(P+3B)h = 74h
00h
(P+34)h = 6Dh
01h
(P+3C)h = 75h
01h
Bank Region 2 (Erase Block Type 1): BIts per cell,
internal ECC
Bits 0-3: bits per cell in erase region
Bit 4: reserved for “internal ECC used”
BIts 5-7: reserved
(P+35)h = 6Eh
03h
(P+3D)h = 76h
03h
Bank Region 2 (Erase Block Type 1): Page mode
and synchronous mode capabilities (defined in
Table 37)
Bit 0: Page-mode reads permitted
Bit 1: Synchronous reads permitted
Bit 2: Synchronous writes permitted
Bits 3-7: reserved
(P+36)h = 6Fh
07h
Bank Region 2 Erase Block Type 2 Information
Bits 0-15: n+1 = number of identical-sized erase
blocks
Bits 16-31: n×256 = number of bytes in erase block
region
(P+37)h = 70h
00h
(P+38)h = 71h
20h
(P+39)h = 72h
00h
(P+3A)h = 73h
64h
Bank Region 2 (Erase Block Type 2)
Minimum block erase cycles × 1000
(P+3B)h = 74h
00h
(P+3C)h = 75h
01h
Bank Region 2 (Erase Block Type 2): BIts per cell,
internal ECC
Bits 0-3: bits per cell in erase region
Bit 4: reserved for “internal ECC used”
BIts 5-7: reserved
Table 40.
Bank and erase block region 2 information(1) (continued)
M58WR064HT
M58WR064HB
Description
Offset
Data
Offset
Data


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