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M36L0T7050T2 Datasheet(PDF) 7 Page - Numonyx B.V |
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M36L0T7050T2 Datasheet(HTML) 7 Page - Numonyx B.V |
7 / 22 page ![]() M36L0T7050T2, M36L0T7050B2 Summary description 7/22 Table 1. Signal names A0-A22(1) 1. A22-A21 are not connected to the PSRAM component. Address Inputs DQ0-DQ15 Common Data Input/Output VDDF Power Supply for Flash Memory VDDQ Flash Memory Power Supply for I/O Buffers VPPF Flash Optional Supply Voltage for Fast Program and Erase VSS Ground VCCP PSRAM Power Supply NC Not Connected Internally DU Do Not Use as Internally Connected Flash memory signals LF Latch Enable Input EF Chip Enable Input GF Output Enable Input WF Write Enable Input RPF Reset Input WPF Write Protect Input KF Burst Clock WAITF Wait Data in Burst Mode PSRAM signals E1P Chip Enable Input GP Output Enable Input WP Write Enable Input E2P Power-down Input UBP Upper Byte Enable Input LBP Lower Byte Enable Input |
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