M29W640FT datasheet(23/71 Pages) NUMONYX

Part #	M29W640FT

Description	64 Mbit (8Mb x8 or 4Mb x16, Page, Boot Block) 3V Supply Flash Memory

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Manufacturer	NUMONYX [Numonyx B.V]

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M29W640FT, M29W640FB

Command interface

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4.2

Fast Program commands

There are four Fast Program commands available to improve the programming throughput,

by writing several adjacent words or bytes in parallel. The Double, Quadruple and Octuple

Byte Program commands are available for x8 operations, while the Double Quadruple Word

Program command are available for x16 operations.

Fast Program commands can be suspended and then resumed by issuing a Program

Suspend command and a Program Resume command, respectively (see Section 4.1.8:

Program Suspend command and Section 4.1.9: Program Resume command).

When VPPH is applied to the VPP/Write Protect pin the memory automatically enters the Fast

Program mode. The user can then choose to issue any of the Fast Program commands.

Care must be taken because applying a VPPH to the VPP/WP pin will temporarily unprotect

any protected block.

4.2.1

Double Byte Program command

The Double Byte Program command is used to write a page of two adjacent Bytes in

parallel. The two bytes must differ only in DQ15A-1. Three bus write cycles are necessary to

issue the Double Byte Program command.

1.

The first bus cycle sets up the Double Byte Program Command.

2.

The second bus cycle latches the Address and the Data of the first byte to be written.

3.

The third bus cycle latches the Address and the Data of the second byte to be written.

4.2.2

Quadruple Byte Program command

The Quadruple Byte Program command is used to write a page of four adjacent Bytes in

parallel. The four bytes must differ only for addresses A0, DQ15A-1. Five bus write cycles

are necessary to issue the Quadruple Byte Program command.

1.

The first bus cycle sets up the Quadruple Byte Program Command.

2.

The second bus cycle latches the Address and the Data of the first byte to be written.

3.

The third bus cycle latches the Address and the Data of the second byte to be written.

4.

The fourth bus cycle latches the Address and the Data of the third byte to be written.

5.

The fifth bus cycle latches the Address and the Data of the fourth byte to be written and

starts the Program/Erase Controller.

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