M29DW641F datasheet(31/80 Pages) NUMONYX

Part #	M29DW641F

Description	64 Mbit (4Mb x16, Multiple Bank, Page, Boot Block) 3V Supply Flash Memory

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Manufacturer	NUMONYX [Numonyx B.V]

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M29DW641F

Command interface

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6.2

Fast Program commands

The M29DW641F offers a set of Fast Program commands to improve the programming

throughput:

●

Double and Quadruple Word, Program

●

Unlock Bypass

When VPPH is applied to the VPP/Write Protect pin the memory automatically enters the Fast

Program mode. The user can then choose to issue any of the Fast Program commands.

Care must be taken because applying a VPPH to the VPP/WP pin will temporarily unprotect

any protected block.

Only one bank can be programmed at any one time. The other bank must be in Read mode

or Erase Suspend. After programming has started, Bus Read Operations in the Bank being

programmed output the Status Register content, while Bus Read Operations to the other

Bank output the contents of the memory array. Fast Program commands can be suspended

and then resumed by issuing a Program Suspend command and a Program Resume

command, respectively (see

Section 6.1.8: Program Suspend command and Section 6.1.9:

Program Resume command).

After the Fast Program command has completed, the memory will return to the Read mode,

unless an error has occurred. When an error occurs Bus Read Operations to the Bank

where the command was issued will continue to output the Status Register. A Read/Reset

command must be issued to reset the error condition and return to Read mode.

One of the Erase commands must be used to set all the bits in a block or in the whole

memory from ’0’ to ’1’.

Typical Program times are given in

Table 12: Program, Erase Times and Program, Erase

Endurance cycles. See either Table 9: Fast Program commands, for a summary of the Fast

Program commands.

6.2.1

Double Word Program command

This is used to write two adjacent Words simultaneously. The addresses of the two Words

must differ only in A0. Three bus write cycles are necessary to issue the command:

1.

The first bus cycle sets up the command.

2.

The second bus cycle latches the Address and the Data of the first Word to be written.

3.

The third bus cycle latches the Address and the Data of the second Word to be written

and starts the Program/Erase Controller.

6.2.2

Quadruple Word Program command

This is used to write four adjacent Words simultaneously. The addresses of the four Words

must differ only in A1 and A0. Five bus write cycles are necessary to issue the command:

1.

The first bus cycle sets up the command.

2.

The second bus cycle latches the Address and the Data of the first Word to be written.

3.

The third bus cycle latches the Address and the Data of the second Word to be written.

4.

The fourth bus cycle latches the Address and the Data of the third Word to be written.

5.

The fifth bus cycle latches the Address and the Data of the fourth Word to be written

and starts the Program/Erase Controller.

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