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M29DW641F Datasheet(PDF) 29 Page - Numonyx B.V

Part # M29DW641F
Description  64 Mbit (4Mb x16, Multiple Bank, Page, Boot Block) 3V Supply Flash Memory
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Manufacturer  NUMONYX [Numonyx B.V]
Direct Link  http://www.numonyx.com
Logo NUMONYX - Numonyx B.V

M29DW641F Datasheet(HTML) 29 Page - Numonyx B.V

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Command interface
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Further issuing of the Resume command is ignored. Another Program Suspend command
can be written after the device has resumed programming.
6.1.10
Program command
The Program command can be used to program a value to one address in the memory array
at a time. The command requires four Bus Write Operations, the final Write Operation
latches the address and data in the internal state machine and starts the Program/Erase
Controller.
Programming can be suspended and then resumed by issuing a Program Suspend
command and a Program Resume command, respectively (see
Section 6.1.8: Program
Suspend command and Section 6.1.9: Program Resume command). If the address falls in a
protected block then the Program command is ignored, the data remains unchanged. The
Status Register is never read and no error condition is given.
After programming has started, Bus Read Operations in the Bank being programmed output
the Status Register content, while Bus Read Operations to the other Bank output the
contents of the memory array. See the section on the Status Register for more details.
Typical program times are given in
Table 12.
After the Program Operation has completed the memory will return to the Read mode,
unless an error has occurred. When an error occurs Bus Read Operations to the Bank
where the command was issued will continue to output the Status Register. A Read/Reset
command must be issued to reset the error condition and return to Read mode.
One of the Erase commands must be used to set all the bits in a block or in the whole
memory from ’0’ to ’1’.
6.1.11
Verify command
The Verify command is used to check if a block is blank or in other words, if it has been
successfully erased and all its bits set to ’1’. It reads the value of the Error bit DQ5. If the
Error bit is set to ’1’, it indicates that the operation failed.
Three cycles are required to issue a Verify command:
1.
The command starts with two unlock cycles.
2.
The third Bus Write cycle sets up the Verify command code along with the address of
the block to be checked.


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