 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
M29DW641F Datasheet(PDF) 14 Page - Numonyx B.V |
|
||||||||||||||||||||||||||||||
M29DW641F Datasheet(HTML) 14 Page - Numonyx B.V |
|
|
14 / 80 page  Signal descriptions M29DW641F 14/80 technique (In-System or Programmer technique). See Table 6: Hardware Protection for details. The VPP/Write Protect pin must not be left floating or unconnected or the device may become unreliable. A 0.1µF capacitor should be connected between the VPP/Write Protect pin and the VSS Ground pin to decouple the current surges from the power supply. The PCB track widths must be sufficient to carry the currents required during Unlock Bypass Program, IPP. 2.7 Reset/Block Temporary Unprotect (RP) The Reset/Block Temporary Unprotect pin can be used to apply a Hardware Reset to the memory or to temporarily unprotect all the blocks previously protected using a High voltage Block Protection technique (In-System or Programmer technique). Note that if VPP/WP is at VIL, then the four outermost parameter blocks will remain protected even if RP is at VID. A Hardware Reset is achieved by holding Reset/Block Temporary Unprotect Low, VIL, for at least tPLPX. If RP is asserted during a Program or Erase Operation, the RB pin remains Low (busy), until the internal Reset Operation is completed, which requires a tPLYH time (see Figure 18: Reset/Block Temporary Unprotect during Program/Erase Operation AC waveforms). The RB signal can be monitored by the system microprocessor to determine whether the Reset Operation is completed or not. If RP is asserted when no Program or Erase Operation is ongoing, the RB pin remains high, VIH. A tPHEL or tPHGL delay elapses before the Reset Operation is completed and RP returns to High, VIH. After this delay, the memory is ready for Bus Read and Bus Write Operations. Holding RP at VID will temporarily unprotect all the blocks previously protected using a High voltage Block Protection technique. Program and Erase Operations on all blocks will be possible. The transition from VIH to VID must be slower than tPHPHH. See the Ready/Busy Output section, Table 24: Reset/Block Temporary Unprotect AC characteristics and Figure 18: Reset/Block Temporary Unprotect during Program/Erase Operation AC waveforms for more details. 2.8 Ready/Busy Output (RB) The Ready/Busy pin is an open-drain output that can be used to identify when the device is performing a Program or Erase Operation. During Program or Erase Operations Ready/Busy is Low, VOL. Ready/Busy is high-impedance during Read mode, Auto Select mode and Erase Suspend mode. After a Hardware Reset, Bus Read and Bus Write Operations cannot begin until Ready/Busy becomes high-impedance. See Table 24 and Figure 18: Reset/Block Temporary Unprotect during Program/Erase Operation AC waveforms. The use of an open-drain output allows the Ready/Busy pins from several memories to be connected to a single pull-up resistor. A Low will then indicate that one, or more, of the memories is busy. |
Similar Part No. - M29DW641F |
|
Similar Description - M29DW641F |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
