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M29DW641F Datasheet(PDF) 9 Page - Numonyx B.V |
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M29DW641F Datasheet(HTML) 9 Page - Numonyx B.V |
9 / 80 page M29DW641F Summary description 9/80 Figure 1. Logic diagram Table 1. Signal names A0-A21 Address Inputs DQ0-DQ15 Data Inputs/Outputs E Chip Enable G Output Enable W Write Enable RP Reset/Block Temporary Unprotect RB Ready/Busy Output VCC Supply voltage VPP/WP VPP/Write Protect VSS Ground NC Not Connected Internally Table 2. Bank architecture Bank Bank size Parameter Blocks Main Blocks No. of Blocks Block size No. of Blocks Block size A 8 Mbit 8 4 KWord 15 32 KWord B 24 Mbit — — 48 32 KWord C 24 Mbit — — 48 32 KWord D 8 Mbit 8 4 KWord 15 32 KWord AI11505 22 A0-A21 W DQ0-DQ15 VCC M29DW641F E VSS 15 G RP RB VPP/WP |
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