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M29DW128F Datasheet(PDF) 8 Page - Numonyx B.V |
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M29DW128F Datasheet(HTML) 8 Page - Numonyx B.V |
8 / 94 page Summary description M29DW128F 8/94 1 Summary description The M29DW128F is a 128 Mbit (16Mb x8 or 8Mb x16) non-volatile memory that can be read, erased and reprogrammed. These operations can be performed using a single low voltage (2.7 to 3.6V) supply. At Power-up the memory defaults to its Read mode. The M29DW128F features an asymmetrical block architecture, with 16 parameter and 254 main blocks, divided into four Banks, A, B, C and D, providing multiple Bank operations. While programming or erasing in one bank, read operations are possible in any other bank. The bank architecture is summarized in Table 2. Eight of the Parameter Blocks are at the top of the memory address space, and eight are at the bottom. Program and Erase commands are written to the Command Interface of the memory. An on- chip Program/Erase Controller simplifies the process of programming or erasing the memory by taking care of all of the special operations that are required to update the memory contents. The end of a program or erase operation can be detected and any error conditions identified. The command set required to control the memory is consistent with JEDEC standards. The Chip Enable, Output Enable and Write Enable signals control the bus operations of the memory. They allow simple connection to most microprocessors, often without additional logic. The device supports Asynchronous Random Read and Page Read from all blocks of the memory array. The M29DW128F has one extra 256 byte block (Extended Block) that can be accessed using a dedicated command. The Extended Block can be protected and so is useful for storing security information. However the protection is irreversible, once protected the protection cannot be undone. Each block can be erased independently, so it is possible to preserve valid data while old data is erased. The device features four different levels of hardware and software block protection to avoid unwanted program or erase (modify). The software block protection features are available in 16 bit memory organization only: ● Hardware Protection: –The VPP/WP provides a hardware protection of the four outermost parameter blocks (two at the top and two at the bottom of the address space). –The RP pin temporarily unprotects all the blocks previously protected using a High Voltage Block Protection technique (see Appendix D: High Voltage Block Protection). ● Software Protection – Standard Protection – Password Protection The memory is offered in TSOP56 (14 x 20mm) and TBGA64 (10 x 13mm, 1mm pitch) packages. The 8-bit Bus mode is only available when the M29DW128F is delivered in TSOP56 package. In order to meet environmental requirements, Numonyx offers the M29DW128F in ECOPACK® packages. ECOPACK packages are Lead-free. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. The memory is supplied with all the bits erased (set to ’1’). |
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