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M28W320FCT Datasheet(PDF) 13 Page - Numonyx B.V |
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M28W320FCT Datasheet(HTML) 13 Page - Numonyx B.V |
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13 / 69 page  M28W320FCT, M28W320FCB Signal descriptions 13/69 minimized. After Reset all blocks are in the Locked state. When Reset is at VIH, the device is in normal operation. Exiting reset mode the device enters read array mode, but a negative transition of Chip Enable or a change of the address is required to ensure valid data outputs. 2.8 VDD supply voltage VDD provides the power supply to the internal core of the memory device. It is the main power supply for all operations (Read, Program and Erase). 2.9 VDDQ supply voltage VDDQ provides the power supply to the I/O pins and enables all Outputs to be powered independently from VDD. VDDQ can be tied to VDD or can use a separate supply. 2.10 VPP Program supply voltage VPP is both a control input and a power supply pin. The two functions are selected by the voltage range applied to the pin. The Supply Voltage VDD and the Program Supply Voltage VPP can be applied in any order. If VPP is kept in a low voltage range (0V to 3.6V) VPP is seen as a control input. In this case a voltage lower than VPPLK gives an absolute protection against program or erase, while VPP > VPP1 enables these functions (see Table 15: DC Characteristics). VPP is only sampled at the beginning of a Program or Erase; a change in its value after the operation has started does not have any effect on Program or Erase, however for Double or Quadruple Word Program the results are uncertain. If VPP is in the range 11.4V to 12.6V it acts as a power supply pin. In this condition VPP must be stable until the Program/Erase algorithm is completed (see Table 17 and Table 18). 2.11 VSS ground VSS is the reference for all voltage measurements. Note: Each device in a system should have VDD, VDDQ and VPP decoupled with a 0.1µF capacitor close to the pin. See Figure 7: AC Measurement Load Circuit. The PCB trace widths should be sufficient to carry the required VPP program and erase currents. |
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