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M28W160CT Datasheet(PDF) 12 Page - Numonyx B.V |
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M28W160CT Datasheet(HTML) 12 Page - Numonyx B.V |
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12 / 50 page  M28W160CT, M28W160CB 12/50 memory location must be erased and repro- grammed. See Appendix C, Figure 17, Program Flowchart and Pseudo Code, for the flowchart for using the Program command. Double Word Program Command This feature is offered to improve the programming throughput, writing a page of two adjacent words in parallel.The two words must differ only for the address A0. Programming should not be attempt- ed when VPP is not at VPPH. The command can be executed if VPP is below VPPH but the result is not guaranteed. Three bus write cycles are necessary to issue the Double Word Program command. ■ The first bus cycle sets up the Double Word Program Command. ■ The second bus cycle latches the Address and the Data of the first word to be written. ■ The third bus cycle latches the Address and the Data of the second word to be written and starts the Program/Erase Controller. Read operations output the Status Register con- tent after the programming has started. Program- ming aborts if Reset goes to VIL. As data integrity cannot be guaranteed when the program opera- tion is aborted, the block containing the memory location must be erased and reprogrammed. See Appendix C, Figure 18, Double Word Pro- gram Flowchart and Pseudo Code, for the flow- chart for using the Double Word Program command. Clear Status Register Command The Clear Status Register command can be used to reset bits 1, 3, 4 and 5 in the Status Register to ‘0’. One bus write cycle is required to issue the Clear Status Register command. The bits in the Status Register do not automatical- ly return to ‘0’ when a new Program or Erase com- mand is issued. The error bits in the Status Register should be cleared before attempting a new Program or Erase command. Program/Erase Suspend Command The Program/Erase Suspend command is used to pause a Program or Erase operation. One bus write cycle is required to issue the Program/Erase command and pause the Program/Erase control- ler. During Program/Erase Suspend the Command In- terface will accept the Program/Erase Resume, Read Array, Read Status Register, Read Electron- ic Signature and Read CFI Query commands. Ad- ditionally, if the suspend operation was Erase then the Program, Block Lock, Block Lock-Down or Protection Program commands will also be ac- cepted. The block being erased may be protected by issuing the Block Protect, Block Lock or Protec- tion Program commands. When the Program/ Erase Resume command is issued the operation will complete. Only the blocks not being erased may be read or programmed correctly. During a Program/Erase Suspend, the device can be placed in a pseudo-standby mode by taking Chip Enable to VIH. Program/Erase is aborted if Reset turns to VIL. See Appendix C, Figure 19, Program Suspend & Resume Flowchart and Pseudo Code, and Figure 21, Erase Suspend & Resume Flowchart and Pseudo Code for flowcharts for using the Program/ Erase Suspend command. Program/Erase Resume Command The Program/Erase Resume command can be used to restart the Program/Erase Controller after a Program/Erase Suspend operation has paused it. One Bus Write cycle is required to issue the command. Once the command is issued subse- quent Bus Read operations read the Status Reg- ister. See Appendix C, Figure 19, Program Suspend & Resume Flowchart and Pseudo Code, and Figure 21, Erase Suspend & Resume Flowchart and Pseudo Code for flowcharts for using the Program/ Erase Resume command. Protection Register Program Command The Protection Register Program command is used to Program the 64 bit user One-Time-Pro- grammable (OTP) segment of the Protection Reg- ister. The segment is programmed 16 bits at a time. When shipped all bits in the segment are set to ‘1’. The user can only program the bits to ‘0’. Two write cycles are required to issue the Protec- tion Register Program command. ■ The first bus cycle sets up the Protection Register Program command. ■ The second latches the Address and the Data to be written to the Protection Register and starts the Program/Erase Controller. Read operations output the Status Register con- tent after the programming has started. The segment can be protected by programming bit 1 of the Protection Lock Register. Bit 1 of the Pro- tection Lock Register protects bit 2 of the Protec- tion Lock Register. Programming bit 2 of the Protection Lock Register will result in a permanent protection of the Security Block (see Figure 6, Se- curity Block and Protection Register Memory Map). Attempting to program a previously protect- ed Protection Register will result in a Status Reg- ister error. The protection of the Protection Register and/or the Security Block is not revers- ible. |
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