14 / 153 page
CONFIDENTIAL
PRELIMINARY
CYNSE10512
CYNSE10256
CYNSE10128
Document #: 38-02069 Rev. *F
Page 14 of 153
3.2
Data and Mask Addressing
Each 72-bit entry in the device can be accessed directly through its address index. The data and mask arrays addresses are as
shown in Figure 3-3.
3.3
Successful Search and Multiple Match Arbitration
During a Search operation, the search data bit is masked with the corresponding global mask bit from the selected Global Mask
Register and the mask array bit before being compared to the data array entry bit to check for a match at that bit position (see
Table 3-1). The entry with a match on every bit position results in a successful Search. For example, in order for a successful
Search within a device to make the device the local winner, all 72-bit positions must generate a match for a 72-bit entry in 72-bit-
configured quadrants. The same applies to 144-bit, 288-bit, and 576-bit searches.
The on-chip priority encoder selects the first matching entry in the database that is nearest to memory address 0. An arbitration
mechanism using a cascade bus determines the global winning device among the local winning devices in a Search cycle. The
global winning device then drives the output signals. When there is no successful Search, the device designated as the last device
(Refer to Section 5.3 for more information on last device designation) will drive the output signals.
Table 3-1. Bit Position Match
Global Mask Bit
Mask Array Bit
Data Array Bit
Search Key Bit
Match Result
0
XXX
1
10
X
X
1
11001
11100
11010
11111
71
0
72
0
1
2
3
N - 1
287
0
72
72
3
2
1
0
7
6
5
4
N - 4
N - 3
N - 2
N - 1
72
72
143
0
72
72
1
0
3
2
5
4
7
6
N - 2
N - 1
72-bit configuration
288-bit configuration
144-bit configuration
N
N/4
N/2
575
0
72
72
3
2
1
0
11
10
9
8
N - 8
N - 7
N - 6
N - 5
72
72
576-bit configuration
N/8
72
72
72
72
7
6
5
4
15
14
13
12
N - 4
N - 3
N - 2
N - 1
Figure 3-3. Addressing the Ayama 10000 Data and Mask Arrays
N = 262144 for CYNSE10512
131072 for CYNSE10256
65536 for CYNSE10128
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