CONFIDENTIAL
PRELIMINARY
CYNSE10512
CYNSE10256
CYNSE10128
Document #: 38-02069 Rev. *F
Page 83 of 153
The following is the sequence of operation for a single 144-bit Search command (also refer to Subsection 6.2, “Command Bus
Parameters,” on page 50).
• Cycle A:
— Command Bus: The host ASIC drives CMDV HIGH and applies Search command CMD[1:0] = “10” (binary). CMD[2] must
be driven to logic low. {CMD[10],CMD[5:3]} signals must be driven with the index to the GMR pair for use in this Search
operation. CMD[8:6] signals must be driven with the same bits that will be driven on SADR[25:23] for CYNSE10512,
SADR[24:22] for CYNSE10256, SADR[23:21] for CYNSE10128 by this device if it has a hit. CMD[9] must be driven to logic
high to indicate a 144-bit search.
— DQ Bus: DQ[71:0] must be driven with the 72-bit data to be compared.
• Cycle B:
— Command Bus: The host ASIC continues to drive CMDV HIGH and applies Search command CMD[1:0] = “10” (binary).
CMD[5:2] must be driven by the index of the comparand register pair for storing the 144-bit word presented on the DQ bus
cycle
CLK2X
CMDV
CMD[1:0]
CE_L
OE_L
CMD[10:2]
Search2
Search4
WE_L
1
cycle
2
cycle
3
cycle
4
cycle
5
cycle
6
cycle
7
cycle
8
cycle
9
cycle
10
HLAT = 001 (binary), TLSZ = 10 (binary),
LRAM = 1 (binary), LDEV = 1 (binary).
Note: |(BHI[2:0)] stands for the boolean ‘OR’ of the entire bus BHI[2:0].
Note: |(LHI[6:0]) stands for the boolean ‘OR’ for the entire bus LHI[6:0].
Note: Each bit in BHO[2:0] is the same logical signal.
Note: Each bit in LHO[1:0] is the same logical signal.
PHS_L
SADR[M:0]
SSF
SSV
ALE_L
Search1
Search2
Search4
10
10
10
10
Search1
Search3
A B A B A B A B
z
0
0
LHO[1:0]
0
(Global miss; this
device is default driver)
I(BHI[2:0])
0
Search3
(Hit on some
device above)
|(LHI[6:0])
0
BHO[2:0]
0
z
0
0
0
z
1
z
1
0
0
z
z
0
1
W1W2X1X2 Y1 Y2Z1 Z2
DQ
D1
D2
D3
D4
(Hit on some
device above)
(Hit on some
device above)
Figure 6-29. 144-bit Search Timing Diagram for Device Number 6 in Block #3
M = 25 for CYNSE10512, 24 for CYNSE10256, 23 for CYNSE10128
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