CONFIDENTIAL
PRELIMINARY
CYNSE10512
CYNSE10256
CYNSE10128
Document #: 38-02069 Rev. *F
Page 59 of 153
The MSE bit in the Command Register must be set high to enable the MultiSearch feature. The same with the Enhanced Mode
(EMODE) bit. TLSZ = 01 (binary), LRAM = 1 (binary), LDEV = 1 (binary) for a single-device configuration. HLAT = 000 (binary)
for this example. The following is the sequence of operation for a single Search command (also refer to Subsection 6.2,
“Command Bus Parameters,” on page 50).
• Cycle A:
— Command Bus: The host ASIC drives CMDV HIGH and applies Search command CMD[1:0] = “10”. The CMD[2] and
CMD[9] signals must be driven to logic 0 for the 72-bit search, but for 144-bit search, CMD[9] = 1 and CMD [2] = 0. For
288-bit search, CMD[9] is don’t care, whereas CMD[2] = 1 for the first “A” cycle and 0 for the last “A” cycle.
{CMD[10],CMD[5:3]} signals must be driven with the index to the GMR pair for use in this Search operation. CMD[7:6]
signals must be driven with the same bits that will be driven on SADR[24:23] for CYNSE10512, SADR[23:22] for
CYNSE10256, SADR[22:21] for CYNSE10128 by this device if it has a hit. CMD[8] must be driven high for MultiSearch
operation.
cycle
CLK2X
CMDV
CMD[1:0]
CE_L
OE_L
CMD[10:2]
WE_L
1
cycle
2
cycle
3
cycle
4
cycle
5
cycle
6
cycle
7
cycle
8
cycle
9
cycle
10
HLAT = 000 (binary), TLSZ = 00 (binary), LRAM = 1 (binary), LDEV = 1 (binary).
PHS_L
SADR[M:0]
SSF
SSV
ALE_L
Miss in Array 1
10
10
M-Search1
M-Search3
A B A B A B A B
1
1
0
0
W
Y1Y2 Z1 Z2Z3 Z4
DQ
D1
D3
Addr
M-Search2
10
D2
1
×72 Hit
×144 Hit
×288 Miss
Figure 6-7. Timing Diagram for Mixed MultiSearch (One Device)
CMD[2]
the last A-cycle
CMPR[2] on B-cycles
Logic 0 for A-cycles
for x72 and x144
Logic 0 on
1st x288 A-cycle
Logic 1 on the
X
D4
Addr W
Addr
X
Addr Y
Z
Miss in Array 0
1
1
0
0
1
1
0
1
1
0
0
in Array 0
×72 Hit
in Array 1 in Array 0
×144 Miss
in Array 1
in Array 0
×288 Hit
in Array 1
M = 25 for CYNSE10512, 24 for CYNSE10256, 23 for CYNSE10128
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