CONFIDENTIAL
PRELIMINARY
CYNSE10512
CYNSE10256
CYNSE10128
Document #: 38-02069 Rev. *F
Page 50 of 153
6.0
Operations and Timing Diagrams
A master device, such as an ASIC controller, issues commands to the Ayama 10000 device using the CMD bus and CMDV
signals. The following subsections describe the operation of these commands.
6.1
Command Encoding
The Ayama 10000 device implements four basic commands, as shown in Table 6-1. The Search command is a non-blocking
operation which allows another operation to be issued immediately on the following cycle. Read, Write and Learn are blocking
operations. There are also other derivative commands that the device supports. The operation of basic commands as well as the
derivative commands are explained in more detail in the following sections.
The command code must be presented to CMD[1:0] while keeping the CMDV signal HIGH for two CLK2X cycles (cycles A and
B) when the CLK_MODE pin is LOW. In CLK2X mode, the controller ASIC must align the instructions using the PHS_L signal.
The command code must be presented to CMD[1:0] while keeping the CMDV signal HIGH for one CLK1X cycle when the
CLK_MODE pin is HIGH. In CLK1X mode, cycle A ends on the falling edge of CLK1X and cycle B ends on the rising edge of
CLK1X. Valid data must be present at the edge ending any given cycle for valid inputs. The CMD[10:2] field passes command
parameters in cycles A and B. All commands must begin with cycle A operations.
6.2
Command Bus Parameters
Table 6.2.1, Table 6.2.2 and Table 6.2.3 list the command bus fields that contain the Ayama 10000 command parameters and
their respective cycles.
6.2.1
Non-Enhanced Mode (EMODE = 0)
Note:
14. The NSE density determines to which SADR field EADR[2:0] is mapped. In Ayama10128, SADR[23:21] gets EADR[2:0]; In Ayama10256, SADR[24:22] gets
EADR[2:0]; In Ayama10512, SADR[25:23] gets EADR[2:0].
Table 6-1. Command Codes
Command Code
(binary)
Command
Description
00
Read
Reads from one of the following: data array, mask array, device registers, or external SRAM.
Read command is also used to issue Read Parity command.
01
Write
Writes to one of the following: data array, mask array, device registers, or external SRAM.
10
Search
Searches the data array for a desired pattern using the specified register from the GMR
array and local mask associated with each data cell.
11
Learn
The device has internal storage for up to sixteen comparands that it can learn. The device
controller can insert these entries at the next-free address (as specified by the NFA register)
using the Learn instruction.
Cm d
Cycle
10
9
8
7
6
5 4 3
2
1 0
A
0 = Single
B
1 = Burst
A
0=Normal
0 = Single
B
1=Parallel
1 = Burst
0=x72
0=x72 or x144
1=x144
1=x288 (first cycle)
X=x288
0=x288 (last cycle)
B
XX
A
0=x72
1=x144
LEARN
SEARCH
WRITE
READ
11
10
A
CMPR[3:0]
CMPR[3:0]
SSR[2:0]
EADR[2:0][14]
0
XX
B
GMR[3]
GMR[2:0]
EADR[2:0][14]
GMR[3]
EADR[2:0][14]
0
1
0
GMR[2:0]
EADR[2:0][14]
0
0
X
X
00
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