CY7C1444AV25 datasheet(22/26 Pages) CYPRESS

Part #	CY7C1444AV25

Description	36-Mbit (1M x 36/2M x 18) Pipelined DCD Sync SRAM

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Manufacturer	CYPRESS [Cypress Semiconductor]

Direct Link	http://www.cypress.com

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22 / 26 page

CY7C1444AV25

CY7C1445AV25

Document #: 38-05351 Rev. *E

Page 22 of 26

ZZ Mode Timing[27, 28]

Notes:

27. Device must be deselected when entering ZZ mode. See Cycle Descriptions table for all possible signal conditions to deselect the device.

28. DQs are in high-Z when exiting ZZ sleep mode.

Switching Waveforms (continued)

t

ZZ

I

SUPPLY

CLK

ZZ

t

ZZREC

ALL INPUTS

(except ZZ)

DON’T CARE

I

DDZZ

t

ZZI

t

RZZI

Outputs (Q)

High-Z

DESELECT or READ Only

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