CA3240EZ datasheet(2/15 Pages) INTERSIL

Part #	CA3240EZ

Description	Dual, 4.5MHz, BiMOS Operational Amplifier with MOSFET Input/Bipolar Output

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Manufacturer	INTERSIL [Intersil Corporation]

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2

FN1050.6

March 4, 2005

Absolute Maximum Ratings

Thermal Information

Supply Voltage (Between V+ and V-) . . . . . . . . . . . . . . . . . . . . 36V

Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8V

Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . (V+ +8V) to (V- -0.5V)

Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1mA

Output Short Circuit Duration (Note 1). . . . . . . . . . . . . . . . Indefinite

Operating Conditions

Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC

Voltage Range . . . . . . . . . . . . . . . . . . . . . 4V to 36V or

±2V to ±18V

Thermal Resistance (Typical, Note 2)

θ

JA (

oC/W)

8 Lead PDIP Package* . . . . . . . . . . . . . . . . . . . . . .

100

Maximum Junction Temperature (Plastic Package) . . . . . . . 150oC

Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC

*Pb-free PDIPs can be used for through hole wave solder process-

ing only. They are not intended for use in Reflow solder processing

applications.

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the

device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTES:

1. Short circuit may be applied to ground or to either supply. Temperatures and/or supply voltages must be limited to keep dissipation within max-

imum rating.

2.

θ

JA is measured with the component mounted on an evaluation PC board in free air.

Electrical Specifications

For Equipment Design, VSUPPLY = ±15V, TA = 25

oC, Unless Otherwise Specified

PARAMETER

SYMBOL

CA3240

CA3240A

UNITS

MIN

TYP

MAX

MIN

TYP

MAX

Input Offset Voltage

VIO

-5

15

-

2

5

mV

Input Offset Current

IIO

-

0.5

30

-

0.5

20

pA

Input Current

II

-

10

50

-

10

40

pA

Large-Signal Voltage Gain

(See Figures 12, 27) (Note 3)

AOL

20

100

-

20

100

-

kV/V

86

100

-

86

100

-

dB

Common Mode Rejection

Ratio (See Figure 17)

CMRR

-

32

320

-

32

320

µV/V

70

90

-

70

90

-

dB

Common Mode Input Voltage Range

(See Figure24)

VICR

-15

-15.5 to

+12.5

11

-15

-15.5 to

+12.5

12

V

Power Supply Rejection Ratio

(See Figure 19)

PSRR

(

∆V

IO/∆V±)

-

100

150

-

100

150

µV/V

76

80

-

76

80

-

dB

Maximum Output Voltage (Note 4)

(See Figures 23, 24)

VOM+

12

13

-

12

13

-

V

VOM-

-14

-14.4

-

-14

-14.4

-

V

Maximum Output Voltage (Note 5)

VOM-

0.4

0.13

-

0.4

0.13

-

V

Total Supply Current

(See Figure 15) For Both Amps

I+

-

8

12

-

8

12

mA

Total Device Dissipation

PD

-

240

360

-

240

360

mW

NOTES:

3. At VO = 26VP-P, +12V, -14V and RL = 2kΩ.

4. At RL = 2kΩ.

5. At V+ = 5V, V- = GND, ISINK = 200µA.

Electrical Specifications

For Equipment Design, VSUPPLY = ±15V, TA = 25

oC, Unless Otherwise Specified

PARAMETER

SYMBOL

TEST CONDITIONS

TYPICAL VALUES

UNITS

CA3240A

CA3240

Input Resistance

RI

1.5

T

Ω

Input Capacitance

CI

44

pF

Output Resistance

RO

60

Ω

Equivalent Wideband Input Noise Voltage

(See Figure 2)

eN

BW = 140kHz, RS = 1MΩ

48

µV

CA3240, CA3240A

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