4

FN1050.6

March 4, 2005

Common-Mode Rejection Ratio

CMRR

32

32

µV/V

90

90

dB

Common-Mode Input Voltage Range (See Figure 24)

-0.5

-0.5

V

2.6

2.6

V

Power Supply Rejection Ratio

PSRR

31.6

31.6

µV/V

90

90

dB

Maximum Output Voltage (See Figures 23, 24)

3

V

0.3

V

Maximum Output Current

Source

20

mA

Sink

1

mA

Slew Rate (See Figure14)

SR

7

7

V/

µs

Gain Bandwidth Product (See Figure 13)

4.5

4.5

MHz

Supply Current (See Figure 15)

I+

4

4

mA

Device Dissipation

20

20

mW

Electrical Specifications

PARAMETER

SYMBOL

TYPICAL VALUES

UNITS

CA3240A

CA3240

Test Circuits and Waveforms

FIGURE 1A. SMALL SIGNAL RESPONSE

FIGURE 1B. LARGE SIGNAL RESPONSE

FIGURE 1C. TEST CIRCUIT

FIGURE 1. SPLIT-SUPPLY VOLTAGE FOLLOWER TEST CIRCUIT AND ASSOCIATED WAVEFORMS

50mV/Div., 200ns/Div.

Top Trace: Input, Bottom Trace: Output

5V/Div., 1

µs/Div.

Top Trace: Input, Bottom Trace: Output

2k

Ω

10k

Ω

CA3240

+15V

-15V

0.1

µF

0.1

µF

100pF

SIMULATED

LOAD

2k

Ω

0.05

µF

+

-

BW (-3dB) = 4.5MHz

SR = 9V/

µs

CA3240, CA3240A