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S-7760A53XX-HCT1 Datasheet(PDF) 29 Page - Seiko Instruments Inc |
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S-7760A53XX-HCT1 Datasheet(HTML) 29 Page - Seiko Instruments Inc |
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29 / 53 page  PROGRAMMABLE PORT CONTROLLER (PORT EXPANDER WITH BUILT-IN E2PROM CIRCUIT) Rev.1.3_00 S-7760A Seiko Instruments Inc. 29 How to Use S-7760A 1. SDA I/O pin and SCL input pin In consideration of I 2C-bus protocol function, the SDA I/O and SCL input pins*1 should be connected with a pull-up resister of 1 to 5 k Ω. The S-7760A cannot transmit normally without using a pull-up resistor. *1. In the case that the SCL input pin of the S-7760A is connected to the tri-state output pin in the master device, connect the SCL input pin with a pull-up resistor as well in order not to set the SCL input pin in high impedance. This prevents the S-7760A from error caused by high impedance from the tri-state pin when resetting the master device during the voltage drop. The bus pull-down function is available for S-7760A by option because it is assumed that the pull-up power supply may be in high impedance depending on case. Except for this IC, if users do not have an element to fix the potentials of SDA and SCL pins, set BPDX in “L” output in order to pull down the SDA and SCL pins. 2. Reset after transmission interruption This IC does not have a pin to reset, but it generally resets the internal circuit by inputting a stop or start condition. However, in case that transmission is interrupted, for example, only the master device is reset because the power supply voltage drops during transmission; the internal circuit maintains the status before interruption. If the status is that the SDA pin outputs “L” (outputs an acknowledge signal or in Read), this IC does not perform the next operation because it cannot receive a start or stop condition from the master device. Therefore it is necessary to finish outputting an acknowledgment signal and the Read operation in SDA. Figure 32 shows how to reset. First, input a start condition. (While the SDA pin is outputting “L”, the S-7760A does not go in the start condition but this “L” output does not affect on the slave device.) Next, input clock (27 clocks) which is equivalent to 3-byte data access from the SCL pin. During this procedure, pull up the SDA line which is connected closer to the master device. Due to this, the SDA pin’s I/O prior to transmission interruption ends so that the SDA pin goes in “H”. After that, by inputting a stop condition, the S-7760A returns to the status possible to perform the general transmission. It is recommended to perform this reset when you initialize, after power-on the master device. A circuit for prevention malfunction by a low power supply voltage is equipped in this IC, thus it automatically resets internally when a low voltage is applied to this IC. Start Condition Stop Condition Clock equivalent to 3-byte data access 1 2 26 27 8 9 SCL SDA Master SDA Slave “L” or “High-Z” “L” or “High-Z” “L” or “High-Z” “High-Z” “High-Z” “High-Z” Figure 32 How to Reset S-7760A |
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