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W83781D Datasheet(PDF) 19 Page - Winbond |
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W83781D Datasheet(HTML) 19 Page - Winbond |
19 / 54 page W83781D/W83781G Publication Release Date: April 14, 2005 - 15 - Revision 2.0 8. CONTROL AND STATUS REGISTERS 8.1 Address Register (Port x5h) The main register is the INDEX Register located at Port x5h. The bit designations are as follows: 7 6 5 4 3 2 1 0 INDEX Pointe Busy Bit7: Read Only The logical 1 indicates the device is busy because of a Serial Bus transaction or another ISA bus transaction. With checking this bit, multiple ISA drivers can use W83781D/G without interfering with each other or a Serial Bus driver. It is the user's responsibility not to have a Serial Bus and ISA bus operations at the same time. This bit is: Set: with a write to Port x5h or when a Serial Bus transaction is in progress. Reset: with a write or read from Port x6h if it is set by a write to Port x5h, or when the Serial Bus transaction is finished. Bit 6-0: Read/Write INDEX of Control and Status Registers. See the tables below for detail. Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Busy Index Pointer (Power On default 00h) (Power On default 0) A6 A5 A4 A3 A2 A1 A0 Index Pointer (A6-A0) Registers Bank A6-A0 in Hex Power On Value of Registers: <7:0>in Binary Notes Configuration Register 0 40h 00001000 Interrupt Status Register 1 0 41h 00000000 Auto-increment to the address of Interrupt Status Register 2 after a read or write to Port x6h. Interrupt Status Register 2 0 42h 00000000 |
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