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W83781D Datasheet(PDF) 10 Page - Winbond

Part # W83781D
Description  H/W MONITORING IC
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Manufacturer  WINBOND [Winbond]
Direct Link  http://www.winbond.com
Logo WINBOND - Winbond

W83781D Datasheet(HTML) 10 Page - Winbond

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W83781D/W83781G
Publication Release Date: April 14, 2005
- 6 -
Revision 2.0
Continued
PIN NAME
PIN NO.
TYPE
DESCRIPTION
-12VIN
31
AIN
Ground-referred inverting op amp input.
+12VIN
32
AIN
0V to 4.096V FSR Analog Inputs.
+5VIN
33
AIN
This pin is Analog Vcc and connects internal monitor
channel IN3 with fixed scale.
+3.3VIN
34
AIN
0V to 4.096V FSR Analog Inputs.
VCOREB
35
AIN
0V to 4.096V FSR Analog Inputs.
VCOREA
36
AIN
0V to 4.096V FSR Analog Inputs.
VREF
37
AOUT
Reference Voltage.
VTIN3
38
AIN
Thermistor 3 terminal input.
VTIN2
39
AIN
Thermistor 2 terminal input.
VTIN1
40
AIN
Thermistor 1 terminal input.
VID0
41
INt
Voltage Supply readouts from P6.This value is read in the
VID/Fan Divisor Register.
OVT#
42
OD12
Over temperature Shutdown Output.
IRQ
43
OUT12t
Interrupt Request.
SMI#
44
OD12
System Management Interrupt (open drain). This output is
enabled when Bit 1 in the Configuration Register (CR40)
is set to 1. The default state is disabled.
A2-A0
45-47
INt
The three lowest order bits of the 16-bit ISA Address Bus.
A0 corresponds to the lowest order bit.
CS#
48
INt
Chip Select input from an external decoder which
decodes high order address bits on the ISA Address Bus.
This is an active low input.
# Indicates Active Low("Not")
7. FUNCTIONAL DESCRIPTION
7.1 General Description
The W83781D/G provides 5 analog positive inputs, 2 analog negative input, 3 fan speed monitors or
fan ON/OFF control, 3 thermistor voltage inputs, case open detection and beep function output when
the monitor value exceed the set limit value. When start the monitor function on the chip, the watch
dog machine monitor every function and store the value to registers. If the monitor value exceeds the
limit value, the interrupt status will be set to 1.
The W83781D/G provides two interface for microprocessor to read/write internal registers. The first
interface use ISA Bus to access which the ports of low byte (bit2~bit0) are defined in the port 5h and
6h. The high byte of these ports is decoded by Chip Select (CS#), the general decoded address is set
to port 295h and port 296h. These two ports are described as following:
Port 295h: W83781D/G Index register port.
Port 296h: Data port.


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