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W83781D Datasheet(PDF) 9 Page - Winbond

Part # W83781D
Description  H/W MONITORING IC
Download  54 Pages
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Manufacturer  WINBOND [Winbond]
Direct Link  http://www.winbond.com
Logo WINBOND - Winbond

W83781D Datasheet(HTML) 9 Page - Winbond

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W83781D/W83781G
Publication Release Date: April 14, 2005
- 5 -
Revision 2.0
PIN NAME
PIN NO.
TYPE
DESCRIPTION
IOR#
1
INts
An active low standard ISA bus I/O Read Control.
IOW#
2
INts
An active low standard ISA bus I/O Write Control.
CLKIN
3
INt
System clock input. Can select 48MHz or 24MHz or
14.318MHz. The default is 24MHz.
D7~D0
4-11
I/O12t
Bi-directional ISA bus Data lines. D0 corresponds to the
low order bit, with D7 the high order bit.
VID1
12
INt
Voltage Supply readouts from P6.This value is read in the
VID/Fan Divisor Register.
VCC (+5V)
13
POWER
+5V VCC power. Bypass with the parallel combination of
10
μF (electrolytic or tantalum) and 0.1μF (ceramic)
bypass capacitors.
GNDD
14
DGROUND
Internally connected to all digital circuitry.
MR
15
INts
Master reset input.
CASEOPEN
16
I/O12t
CASE OPEN. An active high input from an external circuit
which latches a Case Open event. This line can go high
without any clamping action intrusion regardless of the
powered state of the W83781D/G. The W83781D/G
provides an internal open drain on this line, controlled by
Bit 7 of IRQ Mask Register 2, to provide a minimum 20 ms
reset of this line.
VID4
17
INt
Voltage Supply readouts from P6.This value is read in the
bit <0> of Device ID Register.
FAN3-FAN1
IN/OUT
18-20
I/O12ts
0V to +5V amplitude fan tachometer input /
Fan on-off control output. These multifunctional pins can
be programmable input or output.
SCL
21
INts
Serial Bus Clock.
SDA
22
I/O12ts
Serial Bus bi-directional Data.
RSTOUT#
23
OUT8t
8 mA driver (open drain), active low output with a 20 ms
minimum pulse width. Available when enabled via Bit 7 in
SMI# Mask Register 2.
VID2
24
INt
Voltage Supply readouts from P6.This value is read in the
VID/Fan Divisor Register.
VID3
25
INt
Voltage Supply readouts from P6.This value is read in the
VID/Fan Divisor Register.
BEEP/GPO#
26
OD48
Beep function or General purpose output (active low).
This pin is open drain driving 48 mA.
This multifunctional pin is programmable selected by
CR4D bit 6.
GNDA
27
AGROUND
Internally connected to all analog circuitry. The ground
reference for all analog inputs.
-5VIN
28
AIN
Ground-referred inverting op amp input.
-5VOUT
29
AOUT
Output of inverting op amp for Input 6.
-12VOUT
30
AOUT
Output of inverting op amp for Input 5.


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