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ISL78100 Datasheet(PDF) 15 Page - Intersil Corporation |
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ISL78100 Datasheet(HTML) 15 Page - Intersil Corporation |
15 / 19 page ![]() 15 FN6626.0 December 17, 2007 CERAMIC CAPACITORS Many ceramic capacitors have strong voltage and temperature coefficients, which reduces effective capacitance as the applied voltage or operating temperature is increased. Pay careful attention when selecting ceramic capacitor type. X5R and X7R families provide much better stability than Y5V, which should generally be avoided unless additional capacitance is added to compensate for the significant changes in value, which occurs overvoltage and temperature. Layout Considerations PCB layout is very important for the converter to function properly. The following general guidelines should be followed: • Separate the Power Ground and Signal Ground; connect them only at one point close to the GND pin. • Maximize the Power Ground area as much as possible. It is essential to ensure the Power Ground return between CIN, COUT, and SWS1,2 as least obstructive as possible. • Place the input capacitor close to VIN and SWS1, SWS2 pins in boost mode. • Make the following PC traces as short as possible: - from SWD1, SWD2 to the inductor in boost mode - from SWS1,SWS2 to the inductor in buck mode - from COUT to PGND • Feedback signals levels are small to improve efficiency. Ensure the reference connection (GND or VIN) between the sense resistor and IC pin doesn't carry switching current. • Place several via holes (thermal vias) under the chip to a backside ground plane to improve heat dissipation • Maximize the copper area around the thermal vias to spread heat away from the chip. Cost-Sensitive Applications For cost-sensitive applications, the BOM can be reduced considerably by: 1. Removing temperature compensation 2. Removing the fault-protection switch 3. Removing the load isolation switch 4. Switching the FB into internal fixed bias mode (400mV across VFB) In this configuration, light level may be controlled using the EN/PWM input to modulate the output current. In the absence of the load isolation switch, LED bias current will vary with PWM duty cycle, due to the discharge of the output capacitor by the LED’s during the PWM off-time. Therefore, low dimming frequencies can only be used in such an application. TABLE 4. BOOST MODE COMPENSATION 12V OPERATION VFB IOUT VOUT (V) 7 10.5 14 17.5 21 24.5 28 LED’s 2 34 567 8 50mV 50mA Electrolytic Ceramic DMIN DMIN DMIN 60µF 40µF 40µF 40µF 100mV 100mA Electrolytic 47µF 47µF Ceramic DMIN DMIN DMIN 40µF 20µF 40µF 40µF 200mV 350mA Electrolytic 47µF 47µF Ceramic DMIN DMIN DMIN 40µF 20µF 40µF 40µF 200mV 1A Electrolytic 47µF 47µF Ceramic DMIN DMIN DMIN 20µF 20µF 40µF 40µF TABLE 5. CERAMIC CAPACITOR VARIABILITY CAPACITOR TYPE TYPICAL VOLTAGE VARIATION TEMPERATURE VARIATION X7R, 10V -30% at 10V -15% at +125°C X5R, 25V -50% at 25V -9% at +85°C Y5V, 6.3V -90% at 6.3V -65% at +85°C ISL78100 |
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