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TMP86FS27FG Datasheet(PDF) 17 Page - Toshiba Semiconductor

Part # TMP86FS27FG
Description  CMOS 8-BIT MICROCONTROLLER
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMP86FS27FG Datasheet(HTML) 17 Page - Toshiba Semiconductor

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86FS27-17
2007-08-07
TMP86FS27
Note 5: If all data of vector area are “00H” or “FFH”, the passwords comparison is not executed
because the device is considered as blank product. However, it is necessary to specify the
password count storage addresses and the password comparison start address even though
it is a blank product. If a password error occurs, the UART function of TMP86FS27 stops
without returning error code to the controller. Therefore, when a password error occurs, the
TMP86FS27 should be reset by RESET pin input.
Note 6: Do not send only end record after transferring of password string. If the TMP86FS27 receives
the end record only after reception of password string, it does not operate correctly.
Description of RAM loader mode
1. The process of the 1st byte through the 4th byte are the same as flash memory writing mode.
2. The receive data in the 5th byte is the RAM loader command data (60H) to write the user’s
program to RAM.
3. When the 5th byte is one of the operation command data shown in Table 2.5.1, the device
sends the echo back data which is the same as received operation command data (in this case,
60H). If the 5th byte data does not correspond to the operation command data, the device
stops UART function after sending 3 bytes of operation command error code: (63H).
4. The process of the 7th byte through the m’th byte are the same as flash memory writing
mode.
5. The receive data in the m’th + 1 through n’th 2byte are received as binary data in Intel Hex
format. No received data are echoed back to the controller.
The data which is not the start mark (3AH for “:”) in Intel Hex format is ignored and does not
send an error code to the controller until the device receives the start mark. After receiving
the start mark, the device receives the data record, that consists of length of data, address,
record type, writing data and checksum. After receiving the checksum of data record, the
device waits the start mark data (3AH) again. The data of data record is written to specified
RAM by the receiving data. Since after receiving an end record, the device starts to calculate
the SUM, the controller should wait the SUM after sending the end record. If receive error or
Intel Hex format error occurs, the UART function of TMP86FS27 stops without returning
error code to the controller.
6. The n’th 1 and the n’th bytes are the SUM value that is sent to the controller in order of the
upper byte and the lower byte. For details on how to calculate the SUM, refer to 2.9
“Checksum (SUM)”. The SUM calculation is performed after detecting the end record, but the
calculation is not executed when receive error or Intel Hex format error has occurred.
The SUM is calculated by the data written to RAM, but the length of data, address, record
type and checksum in Intel Hex format are not included in SUM.
7. The boot program jumps to the first address that is received as data in Intel Hex format after
sending the SUM to the controller.


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