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TMP86FS27FG Datasheet(PDF) 15 Page - Toshiba Semiconductor |
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TMP86FS27FG Datasheet(HTML) 15 Page - Toshiba Semiconductor |
15 / 32 page ![]() 86FS27-15 2007-08-07 TMP86FS27 12. The receive data in the m’th + 1 through n’th − 2 byte are received as binary data in Intel Hex format. No received data are echoed back to the controller. The data which is not the start mark (3AH for “:”) in Intel Hex format is ignored and does not send an error code to the controller until the device receives the start mark. After receiving the start mark, the device receives the data record, that consists of length of data, address, record type, writing data and checksum. After receiving the checksum of data record, the device waits the start mark data (3AH) again. The data of data record is temporarily stored to RAM and then, is written to specified flash memory by page (32 bytes) writing. For details of an organization of flash memory, refer to 2. “Serial PROM Mode”. Since after receiving an end record, the device starts to calculate the SUM, the controller should wait the SUM after sending the end record. If receive error or Intel Hex format error occurs, the device stops UART function without returning error code to the controller. 13. The n’th − 1 and the n’th bytes are the SUM value that is sent to the controller in order of the upper byte and the lower byte. For details on how to calculate the SUM, refer to 2.9 “Checksum (SUM)”. The SUM calculation is performed after detecting the end record, but the calculation is not executed when receive error or Intel Hex format error has occurred. The time required to calculate the SUM of the 60 Kbytes of Flash memory area is approximately 375 ms at fc = 16 MHz. After the SUM calculation, the device sends the SUM data to the controller. After sending the end record, the controller can judge that the transmission has been terminated correctly by receiving the checksum. 14. After sending the SUM, the device waits for the next operation command data. |
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