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D16750 Datasheet(PDF) 6 Page - Digital Core Design |
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D16750 Datasheet(HTML) 6 Page - Digital Core Design |
6 / 7 page All trademarks mentioned in this document are trademarks of their respective owners. Copyright 1999-2007 DCD – Digital Core Design. All Rights Reserved. http://www.DigitalCoreDesign.com http://www.dcd.pl D16X50 UARTS FAMILY OVERVIEW The family of DCD D16X50 UART IP Cores combine a high–performance, low cost, and small compact size, offering the best price/performance ratio in the IP Market. The DCD’s Cores are dedicated for use in cost-sensitive consumer products, computer peripherals, office automation, automotive control systems, security and telecommunication applications. The D16X50 IP Cores are written in pure VHDL/VERILOG HDL languages which make them technologically independent. All of the D16X50 IP Cores can be fully customized according to customer needs. Design D16450 1 - - - - -* -* D16550 1 2* 16 - - -* -* D16750 1 2* 64 - -* -* D16552 2 4* 16 - - D16752 2 4* 64 -* -* D16754 4 8* 64 -* -* *-Optional D16X50 family of Configurable UARTs with FIFO IP Cores |
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