SN74V3640 datasheet(42/50 Pages) TI

Part #	SN74V3640

Description	1024 횞 36, 2048 횞 36, 4096 횞 36, 8192 횞 36, 16384 횞 36, 32768 횞 36 3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES

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Manufacturer	TI [Texas Instruments]

Direct Link	http://www.ti.com

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42 / 50 page

SN74V3640, SN74V3650, SN74V3660, SN74V3670, SN74V3680, SN74V3690

1024

× 36, 2048 × 36, 4096 × 36, 8192 × 36, 16384 × 36, 32768 × 36

3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES

SCAS668A – NOVEMBER 2001 – REVISED MARCH 2003

42

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

n + 1 Words in FIFO

(see Note B)

n + 2 Words in FIFO

(see Note C)

n Words in FIFO

(see Note B)

n + 1 Words in FIFO

(see Note C)

WCLK

WEN

PAE

RCLK

REN

tCLKL

tENS

tENH

tPAEA

n Words in FIFO (see Note B)

n + 1 Words in FIFO (see Note C)

tENS

tPAEA

NOTES: A. n = PAE offset

B. For standard mode

C. For FWFT mode

D. PAE is asserted low on RCLK transition and reset to high on WCLK transition.

E. Select this mode by setting PFM low during master reset.

tCLKH

Figure 18. Asynchronous Programmable Almost-Empty Flag Timing (Standard and FWFT Modes)

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