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SN74V3640 Datasheet(PDF) 33 Page - Texas Instruments |
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SN74V3640 Datasheet(HTML) 33 Page - Texas Instruments |
33 / 50 page SN74V3640, SN74V3650, SN74V3660, SN74V3670, SN74V3680, SN74V3690 1024 × 36, 2048 × 36, 4096 × 36, 8192 × 36, 16384 × 36, 32768 × 36 3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES SCAS668A – NOVEMBER 2001 – REVISED MARCH 2003 33 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 W2 (see Note C) WCLK RCLK REN RT EF PAF HF PAE 12 1 2 WEN tENS tENH tENS tENH tA tA tA tsk2 tENS tENH tREF tREF tPAES tHF tPAFS Q0–Qn Wx Wx + 1 tRTS tRTS W1 (see Note C) NOTES: A. Retransmit setup is complete after EF returns high; only then can a read operation begin. B. OE = low C. W1 = first word written to the FIFO after master reset, W2 = second word written to the FIFO after master reset D. No more than (D – 2) words may be written to the FIFO between reset (master or partial) and retransmit setup. Therefore, FF is high throughout the retransmit setup procedure. D = 1024 for the SN74V3640, D = 2048 for the SN74V3650, D = 4096 for the SN74V3660, D = 8192 for the SN74V3670, D = 16384 for the SN74V3680, and D = 32768 for the SN74V3690. E. There must be at least two words written to and two words read from the FIFO before a retransmit operation can be invoked. F. RM is set high during MRS. Figure 8. Retransmit Timing (Standard Mode) |
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