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LIS202DL Datasheet(PDF) 26 Page - STMicroelectronics |
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LIS202DL Datasheet(HTML) 26 Page - STMicroelectronics |
26 / 36 page Register description LIS202DL 26/36 7.13 WU_CFG_2 (34h) 7.14 WU_SRC_2 (35h) Table 30. Register AOI LIR res_1 res_2 YHIE YLIE XHIE XLIE Table 31. Register description AOI And/Or combination of Interrupt events. Default value: 0 (0: OR combination of interrupt events; 1: AND combination of interrupt events) LIR Latch Interrupt request into WU_SRC_2 reg with the WU_SRC_2 reg cleared by reading WU_SRC_2 reg. Default value: 0 (0: interrupt request not latched; 1: interrupt request latched) res_1 Reserved at Value: 0. Value should not be changed. res_2 Reserved at Value: 0. Value should not be changed. YHIE Enable interrupt generation on Y high event. Default value: 0 (0: disable interrupt request; 1: enable interrupt request on measured accel. value higher than preset threshold) YLIE Enable interrupt generation on Y low event. Default value: 0 (0: disable interrupt request; 1: enable interrupt request on measured accel. value lower than preset threshold) XHIE Enable interrupt generation on X high event. Default value: 0 (0: disable interrupt request; 1: enable interrupt request on measured accel. value higher than preset threshold) XLIE Enable interrupt generation on X low event. Default value: 0 (0: disable interrupt request; 1: enable interrupt request on measured accel. value lower than preset threshold) Table 32. Register -- IA -- -- YH YL XH XL Table 33. Register description IA Interrupt Active. Default value: 0 (0: no interrupt has been generated; 1: one or more interrupt events have been generated) YH Y High. Default value: 0 (0: no interrupt; 1: YH event has occurred) YL Y Low. Default value: 0 (0: no interrupt; 1: YL event has occurred) |
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