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W83977EF-AW Datasheet(PDF) 11 Page - Winbond |
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W83977EF-AW Datasheet(HTML) 11 Page - Winbond |
11 / 142 page W83977EF-AW/W83977EG-AW Publication Release Date: Apr. 2006 -9- Revision 1.2 4. PIN DESCRIPTION Note: Please refer to Section 11.2 DC CHARACTERISTICS for details. I/O6t - TTL level bi-directional pin with 6 mA source-sink capability I/O8t - TTL level bi-directional pin with 8 mA source-sink capability I/O8 - CMOS level bi-directional pin with 8 mA source-sink capability I/O12t - TTL level bi-directional pin with 12 mA source-sink capability I/O12 - CMOS level bi-directional pin with 12 mA source-sink capability I/O16u - CMOS level bi-directional pin with 16 mA source-sink capability with internal pull-up resistor I/OD16u - CMOS level bi-directional pin open drain output with 16 mA sink capability with internal pull-up resistor I/O24t - TTL level bi-directional pin with 24 mA source-sink capability OUT8t - TTL level output pin with 8 mA source-sink capability OUT12t - TTL level output pin with 12 mA source-sink capability OD12 - Open-drain output pin with 12 mA sink capability OD24 - Open-drain output pin with 24 mA sink capability INt - TTL level input pin INc - CMOS level input pin INcu - CMOS level input pin with internal pull-up resitor INcs - CMOS level Schmitt-triggered input pin INts - TTL level Schmitt-triggered input pin INtsu - TTL level Schmitt-triggered input pin with internal pull-up resistor 4.1 Host Interface SYMBOL PIN I/O FUNCTION A0 −A10 74-84 INt System address bus bits 0-10 A11-A14 86-89 INt System address bus bits 11-14 A15 91 INt System address bus bit 15 D0 −D5 109-114 I/O12t System data bus bits 0-5 D6 −D7 116-117 I/O12t System data bus bits 6-7 IOR# 105 INts CPU I/O read signal IOW# 106 INts CPU I/O write signal AEN 107 INts System address bus enable IOCHRDY 108 OD24 In EPP Mode, this pin is the IO Channel Ready output to extend the host read/write cycle. MR 118 INts Master Reset; Active high; MR is low during normal operations. DACK0# 119 INtsu DMA Channel 0 Acknowledge signal. (CR2C bit 5_4 = 00, default) GP16 (WDTO) I/O12t General purpose I/O port 1bit 6. (CR2C bit 5_4 = 01) Alternate function from GP16: Watch dog timer output P15 I/O12t KBC P15 I/O port. (CR2C bit 5_4 = 10) |
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