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W83977EF-AW Datasheet(PDF) 80 Page - Winbond |
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W83977EF-AW Datasheet(HTML) 80 Page - Winbond |
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80 / 142 page  W83977EF-AW/W83977EG-AW -78- 9.2 Alternate I/O Functions W83977EF/EG provides several alternate functions which are scattered among the GP I/O ports. Table 9.2.1 shows their assignments. Polarity bit can also be set to alter their polarity. Table 9.2.1 GP I/O PORT ALTERNATE FUNCTION GP10 Interrupt Steering GP11 Interrupt Steering GP12 Watch Dog Timer Output/IRRX input GP13 Power LED output/IRTX output GP14 General Purpose Address Decoder/Keyboard Inhibit(P17) GP15 General Purpose Write Strobe/ 8042 P12 GP16 Watch Dog Timer Output GP17 Power LED output GP20 Keyboard Reset (8042 P20) GP21 8042 P13 GP22 8042 P14 GP23 8042 P15 GP24 8042 P16 GP25 GATE A20 (8042 P21) 9.2.1 Interrupt Steering GP10, and GP11can be programmed to map their own interrupt channels. The selection of IRQ channel can be done in configuration registers CR70 and CR72 of logical device 7 and logical device 9. Each interrupt channel also has its own 1 ms debounce filter that is used to reject any noise whose width is equal to or less than 1 ms. 9.2.2 Watch Dog Timer Output Watch Dog Timer contains a one second/minute resolution down counter, CRF2 of Logical Device 8, and two watch Dog control registers, WDT_CTRL0 and WDT_CTRL1 of Logical Device 8. The down counter can be programmed within the range from 1 to 255 seconds/minutes. Writing any new non- zero value to CRF2 or reset signal coming from a Mouse interrupt or Keyboard interrupt (CRF2 also contains non-zero value) will cause the Watch Dog Timer to reload and start to count down from the new value. As the counter reaches zero, (1) Watch Dog Timer time-out occurs and the bit 0 of WDT_CTRL1 will be set to logic 1; (2) Watch Dog interrupt output is asserted if the interrupt is enable in CR72 of logical device 8; and (3) Power LED starts to toggle output if the bit 3 of WDT_CTRL0 is enabled. WDT_CTRL1 also can be accessed through GP2 I/O base address + 1. |
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