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W83977EF-AW Datasheet(PDF) 63 Page - Winbond |
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W83977EF-AW Datasheet(HTML) 63 Page - Winbond |
63 / 142 page W83977EF-AW/W83977EG-AW Publication Release Date: Apr. 2006 -61- Revision 1.2 Bit 7: This bit reflects the complement of the Busy input. Bit 6: This bit reflects the nAck input. Bit 5: This bit reflects the PError input. Bit 4: This bit reflects the Select input. Bit 3: This bit reflects the nFault input. Bit 2-0: These three bits are not implemented and are always logic one during a read. 7.3.4 Device Control Register (DCR) The bit definitions are as follows: 7 6 5 4 3 2 1 0 11 strobe autofd nInit SelectIn ackIntEn Direction Bit 6, 7: These two bits are logic one during a read and cannot be written. Bit 5: This bit has no effect and the direction is always out if mode = 000 or mode = 010. Direction is valid in all other modes. 0 the parallel port is in output mode. 1 the parallel port is in input mode. Bit 4: Interrupt request enable. When this bit is set to a high level, it may be used to enable interrupt requests from the parallel port to the CPU due to a low to high transition on the ACK# input. Bit 3: This bit is inverted and output to the SLIN# output. 0 The printer is not selected. 1 The printer is selected. Bit 2: This bit is output to the INIT# output. Bit 1: This bit is inverted and output to the AFD# output. Bit 0: This bit is inverted and output to the STB# output. |
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